Datasheet
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I
DD
RMS
2V
P
R
L
P
SUP
V
DD
I
DD
RMS
V
DD
2V
P
R
L
Efficiency
P
L
P
SUP
where
P
L
V
L
RMS
2
R
L
V
p
2
2R
L
V
L
RMS
V
P
2
(3)
Efficiency of a BTL configuration
V
P
2V
DD
P
L
R
L
2
12
2V
DD
(4)
TPA321
SLOS312C – JUNE 2000 – REVISED JUNE 2004
APPLICATION INFORMATION (continued)
Table 1 employs Equation 4 to calculate efficiencies for three different output power levels. The efficiency of the
amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a
nearly flat internal power dissipation over the normal operating range. The internal dissipation at full output power
is less than in the half-power range. Calculating the efficiency for a specific system is the key to proper power
supply design.
Table 1. Efficiency vs Output Power in 3.3-V 8-Ω BTL Systems
PEAK-to-PEAK INTERNAL
OUTPUT POWER EFFICIENCY
VOLTAGE DISSIPATION
(W) (%)
(V) (W)
0.125 33.6 1.41 0.26
0.25 47.6 2.00 0.29
0.375 58.3 2.45
(1)
0.28
(1) High-peak voltage values cause the THD to increase.
A final point to remember about linear amplifiers (either SE or BTL) is how to manipulate the terms in the
efficiency equation to utmost advantage when possible. Note that in Equation 4 , V
DD
is in the denominator. This
indicates that as V
DD
goes down, efficiency goes up.
15