Datasheet
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INPUT RESISTANCE
C
i
IN
Z
i
Z
f
Input
Signal
f=
1
2 Z Cp
i i
(1)
INPUT CAPACITOR, C
I
f =
c
1
2 Z Cp
i i
–3dB
f
c
(2)
C =
i
1
2 Z fp
i c
(3)
TPA3122D2
SLOS527A – DECEMBER 2007 – REVISED DECEMBER 2007
For design purposes, the input network (discussed in the next section) should be designed assuming an input
impedance of 8 k Ω , which is the absolute minimum input impedance of the TPA3122D2. At the higher gain
settings, the input impedance could increase as high as 72 k Ω
Table 1. Gain Setting
AMPLIFIER GAIN (dB) INPUT IMPEDANCE (k Ω )
GAIN1 GAIN0
TYPICAL TYPICAL
0 0 20 60
0 1 26 30
1 0 32 15
1 1 36 9
Changing the gain setting can vary the input resistance of the amplifier from its smallest value, 10 k Ω ± 20%, to
the largest value, 60 k Ω ± 20%. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB or
cutoff frequency may change when changing gain steps.
The -3-dB frequency can be calculated using Equation 1 . Use the Z
I
values given in Table 1 .
In the typical application, an input capacitor
I
) is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, C
I
and the input impedance of the amplifier (Z
I
) form a
high-pass filter with the corner frequency determined in Equation 2 .
The value of C
I
is important, as it directly affects the bass (low-frequency) performance of the circuit. Consider
the example where Z
I
is 20 k Ω and the specification calls for a flat bass response down to 20 Hz. Equation 2 is
reconfigured as Equation 3 .
In this example, C
I
is 0.4 µF; so, one would likely choose a value of 0.47 µ F as this value is commonly used. If
the gain is known and is constant, use Z
I
from Table 1 to calculate C
I
. A further consideration for this capacitor is
the leakage path from the input source through the input network
I
) and the feedback network to the load. This
leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially
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