Datasheet

TPA3113D2
www.ti.com SLOS650E –AUGUST 2009–REVISED JULY 2012
DEVICE INFORMATION
Gain Setting Via GAIN0 and GAIN1 Inputs
The gain of the TPA3113D2 is set by two input terminals, GAIN0 and GAIN1. The voltage slew rate of these gain
terminals, along with terminals 1 and 14, must be restricted to no more than 10V/ms. For higher slew rates, use
a 100kΩ resistor in series with the terminals.
The gains listed in Table 1 are realized by changing the taps on the input resistors and feedback resistors inside
the amplifier. This causes the input impedance (Z
I
) to be dependent on the gain setting. The actual gain settings
are controlled by ratios of resistors, so the gain variation from part-to-part is small. However, the input impedance
from part-to-part at the same gain may shift by ±20% due to shifts in the actual resistance of the input resistors.
For design purposes, the input network (discussed in the next section) should be designed assuming an input
impedance of 7.2 kΩ, which is the absolute minimum input impedance of the TPA3113D2. At the lower gain
settings, the input impedance could increase as high as 72 kΩ
Table 1. Gain Setting
INPUT IMPEDANCE
AMPLIFIER GAIN (dB)
(kΩ)
GAIN1 GAIN0
TYP TYP
0 0 20 60
0 1 26 30
1 0 32 15
1 1 36 9
SD Operation
The TPA3113D2 employs a shutdown mode of operation designed to reduce supply current (I
CC
) to the absolute
minimum level during periods of nonuse for power conservation. The SD input terminal should be held high (see
specification table for trip point) during normal operation when the amplifier is in use. Pulling SD low causes the
outputs to mute and the amplifier to enter a low-current state. Never leave SD unconnected, because amplifier
operation would be unpredictable.
For the best power-off pop performance, place the amplifier in the shutdown mode prior to removing the power
supply voltage.
Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s) :TPA3113D2