Datasheet
2
2
2
L
P
L S
OUT
L
R
V
R R
P for unclipped power
R
æ ö
æ ö
´
ç ÷
ç ÷
ç ÷
+ ´
è ø
è ø
=
´
TPA3111D1
SLOS618E –AUGUST 2009–REVISED AUGUST 2012
www.ti.com
(1)
Where:
R
S
is the total series resistance including R
DS(on)
, and any resistance in the output filter.
R
L
is the load resistance.
V
P
is the peak amplitude of the output possible within the supply rail.
V
P
= 4 × PLIMIT voltage if PLIMIT < 4 × V
P
P
OUT
(10%THD) = 1.25 × P
OUT
(unclipped)
Table 2. PLIMIT Typical Operation
Output Voltage
Test Conditions () PLIMIT Voltage Output Power (W)
Amplitude (V
P-P
)
PVCC=24V, Vin=1Vrms,
1.92 10 15.0
RL=4Ω, Gain=20dB
PVCC=24V, Vin=1Vrms,
1.24 5 10.0
RL=4Ω, Gain=20dB
PVCC=12V, Vin=1Vrms,
1.75 10 15.3
RL=4Ω, Gain=20dB
PVCC=12V, Vin=1Vrms,
1.20 5 10.3
RL=4Ω, Gain=20dB
GVDD Supply
The GVDD Supply is used to power the gates of the output full bridge transistors. It can also used to supply the
PLIMIT voltage divider circuit. Add a 1μF capacitor to ground at this pin.
DC Detect
TPA3111D1 has circuitry which will protect the speakers from DC current which might occur due to defective
capacitors on the input or shorts on the printed circuit board at the inputs. A DC detect fault will be reported on
the FAULT pin as a low state. The DC Detect fault will also cause the amplifier to shutdown by changing the
state of the outputs to Hi-Z. To clear the DC Detect it is necessary to cycle the PVCC supply. Cycling SD will
NOT clear a DC detect fault.
A DC Detect Fault is issued when the output differential duty-cycle exceeds 14% (eg. +57%, -43%) for more than
420 ms at the same polarity. This feature protects the speaker from large DC currents or AC currents less than 2
Hz. To avoid nuisance faults due to the DC detect circuit, hold the SD pin low at power-up until the signals at the
inputs are stable. Also, take care to match the impedance seen at the positive and negative input to avoid
nuisance DC detect faults.
The minimum differential input voltages required to trigger the DC detect are shown in Table Table 3. The inputs
must remain at or above the voltage listed in the table for more than 420 ms to trigger the DC detect.
Table 3. DC Detect Threshold
AV(dB) Vin (mV, differential)
20 112
26 56
32 28
36 17
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