Datasheet

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Gate
Drive
_
+
Gate
Drive
_
+
_
+
_
+
Gain
Adjust
Gain
Adjust
Start-Up
Protection
Logic
Short-Circuit
Detect
Thermal V
CC
OK
Ramp
Generator
Biases
and
References
Gain
2
AGNDVREF
VREF
PV
CC
INN
OUTN
PGND
PV
CC
OUTP
PGND
INP
SHUTDOWN
GAIN1
GAIN0
COSC
ROSC
BYPASS
SD
_
+
_
+
Deglitch
Logic
Deglitch
Logic
V
CC
V
CC
BSP
BSN
Clamp
Reference
VCLAMP
TPA3007D1
SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
Terminal Functions
TERMINAL
I/O DESCRIPTION
NAME NO.
AGND 18, 19 Analog ground terminal
Bootstrap terminal for high-side gate drive of negative BTL output (connect a 0.22 µ F
BSN 8 I
capacitor with a 51 Ω resistor in series from OUTN to BSN)
Bootstrap terminal for high-side gate drive of positive BTL output (connect a 0.22 µ F
BSP 17 I
capacitor with a 51 Ω resistor in series from OUTP to BSP)
BYPASS 22 I Connect 1 µ F capacitor to ground for BYPASS voltage filtering
COSC 21 I Connect a 220 pF capacitor to ground to set oscillation frequency
GAIN0 3 I Bit 0 of gain control (see Table 2 for gain settings)
GAIN1 4 I Bit 1 of gain control (see Table 2 for gain settings)
INN 1 I Negative differential input
INP 2 I Positive differential input
Negative BTL output, connect Schottky diode from PGND to OUTN for short-circuit
OUTN 10, 11 O
protection
OUTP 14, 15 O Positive BTL output, connect Schottky diode from PGND to OUTP for short-circuit protection
PGND 6, 12, 13 Power ground
PV
CC
9, 16 I High-voltage power supply (for output stages)
ROSC 20 I Connect 120 k Ω resistor to ground to set oscillation frequency
SHUTDOWN 5 I Shutdown terminal (active low), TTL compatible, 21-V compliant
V
CC
24 I Analog high-voltage power supply
VCLAMP 7 O Connect 1 µ F capacitor to ground to provide reference voltage for H-bridge gates
VREF 23 O 5-V internal regulator for control circuitry (connect a 0.1 µ F to 1 µ F capacitor to ground)
Functional Block Diagram
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