Datasheet
TPA3004D2
SLOS407E –FEBRUARY 2003–REVISED JANUARY 2011
www.ti.com
Pin Functions
Pin
I/O DESCRIPTION
NO. NAME
AGND 26 - Analog ground for digital/analog cells in core
AV
CC
33 - High-voltage analog power supply (8.5 V to 18 V)
AV
DD
29 O 5-V Regulated output capable of 100-mA output
AV
DD
REF 7 O 5-V Reference output—provided for connection to adjacent VREF terminal.
BSLN 13 I/O Bootstrap I/O for left channel, negative high-side FET
BSLP 24 I/O Bootstrap I/O for left channel, positive high-side FET
BSRN 48 I/O Bootstrap I/O for right channel, negative high-side FET
BSRP 37 I/O Bootstrap I/O for right channel, positive high-side FET
COSC 28 I/O I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at
V2P5
FADE 30 I Input for controlling volume ramp rate. A logic low on this pin places the amplifier in fade mode.
A logic high on this pin allows a quick transition to the desired volume setting when cycling SD
or during power-up.
LINN 6 I Negative differential audio input for left channel
LINP 5 I Positive differential audio input for left channel
LOUTN 16, 17 O Class-D ½-H-bridge negative output for left channel
LOUTP 20, 21 O Class-D ½-H-bridge positive output for left channel
MODE 34 I Input for MODE control. A logic high on this pin places the amplifier in the variable output mode
and the Class-D outputs are disabled. A logic low on this pin places the amplifier in the Class-D
mode and Class-D stereo outputs are enabled. Variable outputs (VAROUTL and VAROUTR)
are still enabled in Class-D mode to be used as line-level outputs for external amplifiers.
MODE_OUT 35 O Output for control of the variable output amplifiers. When the MODE pin (34) is a logic high, the
MODE_OUT pin is driven low. When the MODE pin (34) is a logic low, the MODE_OUT pin is
driven high. This pin is intended for MUTE control of an external headphone amplifier. Leave
unconnected when not used for headphone amplifier control.
PGNDL 18, 19 - Power ground for left channel H-bridge
PGNDR 42, 43 - Power ground for right channel H-bridge
PVCCL 14, 15 Power supply for left channel H-bridge (tied to pins 22 and 23 internally), not connected to
PVCCR or AV
CC
.
PVCCL 22, 23 Power supply for left channel H-bridge (tied to pins 14 and 15 internally), not connected to
PVCCR or AV
CC
.
PVCCR 38,39 Power supply for right channel H-bridge (tied to pins 46 and 47 internally), not connected to
PVCCL or AV
CC
.
PVCCR 46, 47 Power supply for right channel H-bridge (tied to pins 38 and 39 internally), not connected to
PVCCL or AV
CC
.
REFGND 12 - Ground for gain control circuitry. Connect to AGND. If using a DAC to control the volume,
connect the DAC ground to this terminal.
RINP 3 I Positive differential audio input for right channel
RINN 2 I Negative differential audio input for right channel
ROSC 27 I/O Current setting resistor for ramp generator. Nominally equal to 1/8*V
CC
ROUTN 44, 45 O Class-D ½-H-bridge negative output for right channel
ROUTP 40, 41 O Class-D ½-H-bridge positive output for right channel
SD 1 I Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance
to V
CC
.
VARDIFF 9 I DC voltage to set the difference in gain between the Class-D and VAROUT outputs. Connect to
GND or AV
DD
REF if VAROUT outputs are unconnected.
VARMAX 10 I DC voltage that sets the maximum gain for the VAROUT outputs. Connect to GND or AV
DD
REF
if VAROUT outputs are unconnected.
VAROUTL 31 O Variable output for left channel audio. Line level output for driving external HP amplifier.
VAROUTR 32 O Variable output for right channel audio. Line level output for driving external HP amplifier.
VCLAMPL 25 - Internally generated voltage supply for left channel bootstrap capacitors.
VCLAMPR 36 - Internally generated voltage supply for right channel bootstrap capacitors.
4 Submit Documentation Feedback Copyright © 2003–2011, Texas Instruments Incorporated
Product Folder Link(s): TPA3004D2