Datasheet

InputSignal
Amplitue(Vrms)
GaindB
Attacktime
Releasetime
Timereset
Timeend
Holdtime
time
Holdtimernotusedafter
firstgainincrease
1
:
1
2:1
1:1
No
ise Gate Threshold
Maximum
Gain
Fixed
Gain
Limiter
Level
Compressio
n R
egion
At
t
ack
T
i
m
e
R
e
l
e
a
s
e
T
im
e
4:1
8:1
10dBV
Rotation
Point
V
OUT
-d
BV
V - dBV
IN
¥:1
TPA2016D2
SLOS524D JUNE 2008 REVISED AUGUST 2009 ........................................................................................................................................................
www.ti.com
Figure 34. Time Diagram Showing the Relation Between the Attack, Release, and Hold Time vs Input
Signal Amplitude and Gain
Figure 35 shows a state diagram of the input signal amplitude vs. the output signal amplitude and a summary of
how the variables from table 1 described in the preceding pages affect them.
Figure 35. Output Signal vs. Input Signal State Diagram
18 Copyright © 2008 2009, Texas Instruments Incorporated
Product Folder Link(s): TPA2016D2