Datasheet

Copper TraceWidth
Solder PadWidth
SolderMask Opening
Copper Trace Thickness
SolderMask Thickness
Trace Width
TPA2014D1
www.ti.com ............................................................................................................................................................... SLAS559A – MAY 2008 – REVISED JUNE 2008
Figure 18. Land Pattern Dimensions
Table 5. Land Pattern Dimensions
SOLDER PAD SOLDER MASK COPPER STENCIL STENCIL
COPPER PAD
DEFINITIONS OPENING THICKNESS OPENING THICKNESS
Nonsolder mask 275 µ m 375 µ m 275 µ m x 275 µ m Sq.
1 oz max (32 µ m) 125 µ m thick
defined (NSMD) (+0.0, – 25 µ m) (+0.0, – 25 µ m) (rounded corners)
NOTES:
1. Circuit traces from NSMD defined PWB lands should be 75 µ m to 100 µ m wide in the exposed area inside
the solder mask opening. Wider trace widths reduce device stand off and impact reliability.
2. Recommend solder paste is Type 3 or Type 4.
3. Best reliability results are achieved when the PWB laminate glass transition temperature is above the
operating the range of the intended application.
4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in
thermal fatigue performance.
5. Solder mask thickness should be less than 20 µ m on top of the copper circuit pattern.
6. Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically
etched stencils results in inferior solder paste volume control.
7. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional
component movement due to solder wetting forces.
Recommended trace width at the solder balls is 75 µ m to 100 µ m to prevent solder wicking onto wider PCB
traces.
For high current pins (SW, PGND, VOUT+, VOUT – , V
CC
IN, and V
CC
OUT) of the TPA2014D1, use 100 µ m trace
widths at the solder balls and at least 500 µ m PCB traces to ensure proper performance and output power for
the device.
For low current pins (IN – , IN+, SDd, SDb, GAIN, V
CC
FB, V
DD
) of the TPA2014D1, use 75 µ m to 100 µ m trace
widths at the solder balls. Run IN- and IN+ traces side-by-side to maximize common-mode noise cancellation.
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