Datasheet

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A J JA Dmax

T Max = T Max P = 150 80.64 (0.317) = 124 C- q - °

(9)

BOARD LAYOUT

Copper TraceWidth

Solder PadWidth

SolderMask Opening

Copper Trace Thickness

SolderMask Thickness

TPA2013D1

SLOS520 – AUGUST 2007

Equation 9 shows that the calculated maximum ambient temperature is 124 ° C at maximum power dissipation

under the above conditions. The TPA2013D1 is designed with thermal protection that turns the device off when

the junction temperature surpasses 150 ° C to prevent damage to the IC. Also, using speakers more resistive than

4- Ω dramatically increases the thermal performance by reducing the output current and increasing the efficiency

of the amplifier.

In making the pad size for the WCSP balls, use nonsolder mask defined (NSMD) land. With this method, the

solder mask opening is made larger than the desired land area, and the opening size is defined by the copper

pad width. Figure 35 and Table 5 show the appropriate diameters for a WCSP layout.

Figure 35. Land Pattern Dimensions

Table 5. Land Pattern Dimensions

SOLDER PAD SOLDER MASK COPPER STENCIL STENCIL

COPPER PAD

DEFINITIONS OPENING THICKNESS OPENING THICKNESS

Nonsolder mask 275 μ m 375 μ m 1 oz max (32 μ m) 275 μ m x 275 μ m Sq. 125 μ m thick

defined (NSMD) (+0.0, – 25 μ m) (+0.0, – 25 μ m) (rounded corners)

NOTES:

1. Circuit traces from NSMD defined PWB lands should be 75 μ m to 100 μ m wide in the exposed area inside

the solder mask opening. Wider trace widths reduce device stand off and impact reliability.

2. Recommend solder paste is Type 3 or Type 4.

3. Best reliability results are achieved when the PWB laminate glass transition temperature is above the

operating the range of the intended application.

4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in

thermal fatigue performance.

5. Solder mask thickness should be less than 20 μ m on top of the copper circuit pattern.

6. Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically

etched stencils results in inferior solder paste volume control.

7. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional

component movement due to solder wetting forces.

Product Folder Link(s): TPA2013D1