Datasheet

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GAIN SETTING VIA GAIN0 AND GAIN1 INPUTS
INPUT RESISTANCE
C
i
IN
Z
i
Z
f
Input
Signal
f
3 dB

1
2 C
i

Z
i

(4)
TPA2000D1
SLOS328F – JUNE 2000 – REVISED MARCH 2004
APPLICATION INFORMATION (continued)
The gain of the TPA2000D1 is set by two input terminals, GAIN0 and GAIN1.
The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This
causes the input impedance (Z
i
) to be dependent on the gain setting. The actual gain settings are controlled by
ratios of resistors, so the actual gain distribution from part-to-part is quite good. However, the input impedance
can shift by up to 30% due to shifts in the actual resistance of the input resistors.
For design purposes, the input network (discussed in the next section) should be designed assuming an input
impedance of 20 kΩ, which is the absolute minimum input impedance of the TPA2000D1. At the higher gain
settings, the input impedance can increase as high as 115 kΩ.
Table 2. GAIN SETTINGS
AMPLIFIER GAIN INPUT IMPEDANCE
(dB) (kΩ)
GAIN1 GAIN0
TYP TYP
0 0 6 104
0 1 12 74
1 0 18 44
1 1 23.5 24
Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest
value to over six times that value. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB
or cutoff frequency also changes by over six times.
The -3-dB frequency can be calculated using Equation 4 .
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