Datasheet
SLOS327C − AUGUST 2000 − REVISED MAY 2001
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
As indicated in Figure 27, following a start condition, each I
2
C device decodes the slave address. The TPA0172
responds with an acknowledge by pulling the SDA line low during the ninth clock cycle, if it decodes the address
as its address.
During a write cycle, the transmitting device must not drive the SDA signal line during the acknowledge cycle
so that the receiving device may drive the SDA signal low. After each byte transfer following the address byte,
the receiving device will pull the SDA line low for one SCL clock cycle. A stop condition will be initiated by the
transmitting device after the last byte is transferred. An example of a write cycle can be found in Figure 28 and
Figure 29.
During a read cycle, the slave receiver will acknowledge the initial address byte if it decodes the address as its
address. Following this initial acknowledge by the slave, the master device becomes a receiver and
acknowledges data bytes sent by the slave. When the master has received all of the requested data bytes from
the slave, the not acknowledge (A
) condition is initiated by the master by keeping the SDA signal high just before
it asserts the stop (P) condition. This sequence terminates a read cycle as shown in Figure 30 and Figure 31.
S Slave Address W Data A PA Data A
From Transmitter
From Receiver
A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
Figure 28. I
2
C Write Cycle
D7 D6 D1 D0 ACK
Stop
Condition
Acknowledge
(Receiver)
I
2
C Device Address and
Read/Write Bit
Last Data Byte
A6 A5 A1 A0
R/W
ACK D7 D6 D1 D0 ACK
Start
Condition
Acknowledge
(From Receiver)
Acknowledge
(Receiver)
SDA
First Data Byte Other
Data Bytes
Figure 29. Multiple Byte Write Transfer
A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
R = Read
S Slave Address R A PA Data A Data
Transmitter
Receiver
Figure 30. I
2
C Read Cycle