Datasheet

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SLOS327C − AUGUST 2000 − REVISED MAY 2001
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
shutdown modes
The TPA0172 employs a shutdown mode of operation designed to reduce supply current (I
DD
) to the absolute
minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN
input terminal
should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN
low causes the
outputs to mute and the amplifier to enter a low-current state (I
DD
= 15 µA). SHUTDOWN should never be left
unconnected because amplifier operation would be unpredictable.
The external SHUTDOWN
pin may also be disabled and its function controlled through the I
2
C interface. Refer
to the I
2
C interface section.
I
2
C interface
The I
2
C interface is used to access the internal registers of the TPA0172. This two pin interface consists of one
clock line (SCL) and one serial data line (SDA). The basic I
2
C access cycles are shown in Figure 26.
The basic access cycle consists of the following:
D A start condition
D A slave address cycle
D Any number of data cycles
D A stop condition
Start Condition (S) Stop Condition (P)
SDA
SCL
Figure 26. I
2
C Start and Stop Conditions
The start and stop conditions are shown in Figure 26. The high-to-low transition of SDA while SCL is high,
defines the start condition. The low-to-high transition of SDA while SCL is high, defines the stop condition. Each
cycle, data, or address consists of 8 bits of serial data followed by one acknowledge bit generated by the
receiving device. Thus, each data/address cycle contains nine bits as shown in Figure 27.
SCL
SDA
MSB
Slave Address Data
Stop
1234567899 1234 56789
Acknowledge Acknowledge
Figure 27. I
2
C Access Cycles