Datasheet

Reference
2-10
Operation
2.5.3 I
2
C Interface Information
The 8-bit I
2
C address of the TPA0172 is 11011a1a0(r/w). Bits 2 and 1,
designated as a1 and a0, are set by the ADDRESS1 and ADDRESS0 pins,
respectively. Bit 0, designated as (r/w), is the read/write bit where a 0
designates the write operation and a 1 designates the read operation.
The TPA0172 has six 8-bit registers with power-up/reset values and bit
assignments as shown in Table 2–7.
Table 2–7. TPA0172 I
2
C Register Definitions
REGISTER NAME POWER-UP/RESET VALUE
(b7b6b5...b0)
BIT ASSIGNMENT
Ri ht i i t 1
0–5: Gain level
Right gain register 1
(BTL gain register)
0011 1111
6: Mute
(BTL
ga
i
n reg
i
s
t
er
)
0011
1111
7: Mute
0–5: Gain level
Left gain register 1
(BTL gain register)
0011 1111
6: Mute
(BTL
ga
i
n reg
i
ster
)
00
7: Mute
0–5: Gain level
Right gain register 2
(SE gain register)
0011 1111
6: Mute
(SE
ga
i
n reg
i
ster
)
00
7: Mute
0–5: Gain level
Left gain register 2
(SE gain register)
0011 1111
6: Mute
(SE
ga
i
n reg
i
ster
)
00
7: Mute
0: Disable internal SHUTDOWN control
1: Disable internal SE/BTL control
Mask register 1111 1111
2: Disable internal PCB enable control
Mask
register
1111
1111
3–6: Unused
7: Powering up indicator (read only)
0: SHUTDOWN
1: HP/LINE
2: Reserved
Control register
0000 0000
3: Mute
Control register 0000 0000
4: Reserved
5: SE/BTL
6: Gain register select
7:PCBEEP