Datasheet

NRND
TP3404
SNOS703 –DECEMBER 2004 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1)(2)
V
DDA
/V
DDD
to GNDA/GNDD 7V
Voltage at Any Li, Lo Pin V
CC
+ 1V to GND − 1V
Current at Any Lo ±100 mA
Voltage at Any Digital Input V
CC
+ 1V to GND − 1V
Current at Any Digital Output ±50 mA
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec.) 300°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, limits printed in BOLD characters are specified for V
CCA
= V
CCD
= 5V ±5%, T
A
= 0°C to +70°C.
Typical characteristics are specified at V
DDA
= V
DDD
= 5.0V, T
A
= 25°C. All signals are referenced to GND, which is the
common of GNDA and GNDD
Symbol Parameter Conditions Min Typ Max Units
DIGITAL INTERFACES
V
IH
Input High Voltage All Digital Inputs (DC) 2 V
V
IL
Input Low Voltage All Digital Inputs (DC) 0.8 V
V
OH
Output High Voltage I
L
= +1 mA 2.4 V
V
OL
Output Low Voltage I
L
= −1 mA 0.4 V
I
IL
Input Low Current All Digital Input, GND < V
IN
< V
IL
−10 10 μA
I
IH
Input High Current All Digital Input, V
IH
< V
IN
< V
CC
−10 10 μA
I
OZ
Output Current in High Impedance (TRl-STATE) BO, CO, and DO −10 10 μA
LINE INTERFACES
R
Li
Input Resistance 0V < V
Li
< V
CC
20 kΩ
C
LLo
Load Capacitance From Lo to GND 200 pF
ROLS Output Resistance Load = 60Ω in Series with 2 μF to GND 3 Ω
V
DC
Mean DC Voltage at Lo Load = 200Ω in Series with 2 μF to GND
1.75 2.25 V
Voltage at LS+, LS−
POWER DISSIPATION
I
CC
0 Power Down Current BCLK = 0 Hz; MCLK = 0 Hz, CCLK = 0 Hz 10 mA
I
CC
1 Power Up Current All 4 Channels Activated 75 mA
TRANSMISSION PERFORMANCE
Transmit Pulse Amplitude at Lo R
L
= 200Ω in Series with 2 μF to GND 1.1 1.3 1.5 Vpk
Input Pulse Amplitude at Li ±60 mVpk
TIMING SPECIFICATIONS
Symbol Parameter Conditions Min Typ Max Units
MASTER CLOCK INPUT SPECIFICATIONS
f
MCLK
Frequency of MCLK 4.096 MHz
Master Clock Tolerance Relative 2X MCLK in Slave −100 +100 ppm
t
WMH
Period of MCLK High Measured from V
IH
to V
IH
70 ns
t
WML
Period of MCLK Low Measured from V
IL
to V
IL
70 ns
t
RM
Rise Time of MCLK Measured from V
IL
to V
IH
15 ns
t
FM
Fall Time of MCLK Measured from V
IH
to V
IL
15 ns
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