Datasheet

NRND
TP3404
SNOS703 –DECEMBER 2004 www.ti.com
Table 6. Status Register Functions
Byte 2 Indication
7 6 5 4 3 2 1 0
0 0 Line 3: deactivated
0 1 Line 3: line signal present but not in sync
1 0 Line 3: activated, bipolar violation
(1)
1 1 Line 3: activated, no bipolar violation
0 0 Line 2: deactivated
0 1 Line 2: line signal present but not in sync
1 0 Line 2: activated, bipolar violation
(1)
1 1 Line 2: activated, no bipolar violation
0 0 Line 1: deactivated
0 1 Line 1: line signal present but not in sync
1 0 Line 1: activated, bipolar violation
(1)
1 1 Line 1: activated, no bipolar violation
0 0 Line 0: deactivated
0 1 Line 0: line signal present but not in sync
1 0 Line 0: activated, bipolar violation
(1)
1 1 Line 0: activated, no bipolar violation
(1) Bipolar Violation does not cause an Interrupt.
STATUS REGISTER
Status information for all 4 channels may be read from the common Status Register by addressing location X′FF.
2 bits per line are coded as shown in Table 6. A change in the status of 1 or more lines is indicated by the INT
pin being pulled low, provided bit 2 of the corresponding control register is set to “ONE” to enable the interrupt for
that line.
BIPOLAR VIOLATION DETECTOR
On an activated line, whenever a line error is received there will be a violation of the AMI coding rule. This is
reported by setting the code 10 for that line. The violation indication is cleared to 11 after a read of the Status
Register.
As an example of the interpretation of the Status Register contents, if the byte 2 read back from the Status
Register =00111001 (=X′39), this indicates the following status of the 4 lines: line 3 is deactivated; line 2 is in
sync with no error since the last read cycle; line 1 is in sync but there has been 1 or more errors since the last
read cycle of the Status Register; line 0 is receiving a line signal but the line transmission is not synchronized.
12 Submit Documentation Feedback Copyright © 2004, Texas Instruments Incorporated
Product Folder Links: TP3404