Datasheet

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Timing Specifications
Clock and Data Timing
All timing parameters are measured at V
OH
=2.0V and V
OL
=0.7V
Long Frame Timing
Note: when measuring signals going to TRI-STATE
®
, the timing delay is measured when the signal is 10% away from the starting level.
Symbol Parameter Conditions Min Typ Max Units
1/t
PM
Frequency of MCLK 1.536
1.544
2.048
4.096
8.192
MHz
MHz
MHz
MHz
MHz
DC
MCLK
MCLK Duty Cycle 40 60 %
t
RM
Rise time of MCLK 10 ns
t
FM
Fall time of MCLK 10 ns
t
SDB
Setup time DR valid to
MCLK low
20 ns
t
HDB
Hold time DR valid from
MCLK low
20 ns
t
DBD
Delay from MCLK high
to DX valid
C
L
=100pF+2LSTTL loads 0 45 ns
t
DZC
Delay from MCLK high
to DX disabled
C
L
=100pF+2LSTTL loads 20 ns
t
TSZC
Delay from MCLK high
to TSX disabled
C
L
=100pF+2LSTTL loads 20 ns
t
DBTS
Delay time to TS
X
low C
L
= 0pF to 150pF 50 ns
t
PDN
PDN persistence 16xt
PM
t
SF
Set-up Time from FS
to MCLK Low
Short Frame Sync Pulse 20 ns
t
HF
Hold Time from MCLK
Low to FS Low
Short Frame Sync Pulse 20 ns
Symbol Parameter Conditions Min Typ Max Units
t
HBFL
Holding time from
Clock to Frame Sync
Long Frame Only 10 ns
t
SBF
Set-up time from
Frame Sync to Clock
low
Long Frame Only 35 ns
t
ZDF
Delay time Valid
Data from FS or
MCLK, whichever
comes later
C
L
= 0pF to 150pF 50 ns