Datasheet

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TMS470R1B1M
16/32-Bit RISC Flash Microcontroller
SPNS109A – SEPTEMBER 2005 – REVISED AUGUST 2006
Table 2. Terminal Functions
TERMINAL INTERNAL
CURRENT
TYPE
(1) (2)
PULLUP/ DESCRIPTION
OUTPUT
NAME NO.
PULLDOWN
(3)
HIGH-END TIMER (HET)
HET[0] 73
HET[1] 72
Timer input capture or output compare. The
HET[8:0,18,20,22] applicable pins can be programmed
HET[2] 71
as general-purpose input/output (GIO) pins. All are
HET[3] 66
high-resolution pins.
HET[4] 65
The high-resolution (HR) SHARE feature allows even
HR pins to share the next higher odd HR pin
HET[5] 63
3.3 V 2 mA -z IPD (20 µA)
structures. This HR sharing is independent of whether
HET[6] 9
or not the odd pin is available externally. If an odd pin
is available externally and shared, then the odd pin
HET[7] 11
can only be used as a general-purpose I/O. For more
HET[8] 12
information on HR SHARE, see the TMS470R1x
HET[18] 15
High-End Timer (HET) Reference Guide (literature
number SPNU199).
HET[20] 18
HET[22] 19
HIGH-END CAN CONTROLLER (HECC)
CAN1HRX 83 5-V tolerant 4 mA HECC1 receive pin or GIO pin
CAN1HTX 84 3.3 V 2 mA -z IPU (20 µA) HECC1 transmit pin or GIO pin
CAN2HRX 54 5-V tolerant 4 mA HECC2 receive pin or GIO pin
CAN2HTX 55 3.3 V 2 mA -z IPU (20 µA) HECC2 transmit pin or GIO pin
STANDARD CAN CONTROLLER (SCC)
SCC receive pin. The CANSRX signal is only
connected to the pad and not to a package pin. For
CANSRX - 5-V tolerant 4 mA
reduced power consumption in low power mode,
CANSRX should be driven output LOW.
SCC transmit pin. The CANSTX signal is only
connected to the pad and not to a package pin. For
CANSTX - 3.3 V 2 mA -z IPU (20 µA)
reduced power consumption in low power mode,
CANSTX should be driven output LOW.
GENERAL-PURPOSE I/O (GIO)
GIOA[0]/INT[0] 141
GIOA[1]/INT[1]/ECLK 136
GIOA[2]/INT[2] 134
General-purpose input/output pins. GIOA[7:0]/INT[7:0]
are interrupt-capable pins.
GIOA[3]/INT[3] 133
5-V tolerant 4 mA
GIOA[1]/INT[1]/ECLK pin is multiplexed with the
GIOA[4]/INT[4] 127
external clock-out function of the external clock
prescale (ECP) module.
GIOA[5]/INT[5] 98
GIOA[6]/INT[6] 78
GIOA[7]/INT[7] 79
GIOB[0]/EBDMAREQ0 43
GIOC[0]/ EBOE 135
GIOB[0], GIOC[4:0], GIOD[5:0], GIOE[7:0:], GIOF[7:0],
GIOC[1]/ EBWR[0] 128
GIOG[7:0], and GIOH[5,0] are multiplexed with the
3.3 V 2 mA -z IPD (20 µA)
expansion bus module.
GIOC[2]/ EBWR[1] 126
See Table 7 .
GIOC[3]/ EBCS[5] 120
GIOC[4]/ EBCS[6] 119
(1) PWR = power, GND = ground, REF = reference voltage, NC = no connect
(2) All I/O pins, except RST , are configured as inputs while PORRST is low and immediately after PORRST goes high.
(3) IPD = internal pulldown, IPU = internal pullup (all internal pullups and pulldowns are active on input pins, independent of the PORRST
state.)
8
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