Datasheet
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expansion bus module (EBM)
TMS470R1B1M
16/32-Bit RISC Flash Microcontroller
SPNS109A – SEPTEMBER 2005 – REVISED AUGUST 2006
The expansion bus module (EBM) is a standalone module used to bond out both general-purpose input/output
pins and expansion bus interface pins. This module supports the multiplexing of the GIO and the expansion bus
interface functions. The module also supports 8- and 16- bit expansion bus memory interface mappings as well
as mapping of the following expansion bus signals:
• 27-bit address bus (EBADDR[26:0] for x8, 19-bit address bus (EBADDR[18:0] for x16
• 8- or 16-bit data bus (EBDATA[7:0] or EBDATA[15:0])
• 2 write strobes (EBWR[1:0])
• 2 memory chip selects (EBCS[6:5])
• 1 output enable (EBOE)
• 1 external hold signal for interfacing to slow memories (EBHOLD)
• 1 DMA request line (EBDMAREQ[0])
Table 7 shows the multiplexing of I/O signals with the expansion bus interface signals. The mapping of these
pins varies depending on the memory mode.
Table 7. Expansion Bus Mux Mapping
(1)
EXPANSION BUS MODULE PINS
GIO
x8
(2)
x16
(2)
GIOB[0] EBDMAREQ[0] EBDMAREQ[0]
GIOC[0] EBOE EBOE
GIOC[2:1] EBWR[1:0] EBWR[1:0]
GIOC[4:3] EBCS[6:5] EBCS[6:5]
GIOD[5:0] EBADDR[5:0] EBADDR[5:0]
GIOE[7:0] EBDATA[7:0] EBDATA[7:0]
GIOF[7:0] EBADDR[13:6] EBDATA[15:8]
GIOG[7:0] EBADDR[21:14] EBADDR[13:6]
GIOH[5] EBHOLD EBHOLD
I2C5SDA EBADDR[26] EBADDR[18]
I2C5SCL EBADDR[25] EBADDR[17]
I2C4SCL EBADDR[24] EBADDR[16]
I2C4SDA EBADDR[23] EBADDR[15]
GIOH[0] EBADDR[22] EBADDR[14]
(1) For more detailed information, see the TMS470R1x Expansion Bus Module (EBM) Reference Guide (literature number SPNU222) and
the TMS470R1x General Purpose Input/Output Reference Guide (literature number SPNU192).
(2) X8 refers to size of memory in 8-bits; X16 refers to size of memory in 16-bits.
Table 8 lists the names of the expansion bus interface signals and their functions.
Table 8. Expansion Bus Pins
PIN DESCRIPTION
EBDMAREQ Expansion bus DMA request
EBOE Expansion bus pin enable
EBWR Expansion bus write strobe EBWR[1] controls EBDATA[15:8] and EBWR[0]
controls EBDATA[7:0]
EBCS Expansion bus chip select
EBADDR Expansion bus address pins
EBDATA Expansion bus data pins
EBHOLD Expansion bus hold: An external device may assert this signal to add wait
states to an expansion bus transaction.
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