Datasheet

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peripheral selects and base addresses
TMS470R1B1M
16/32-Bit RISC Flash Microcontroller
SPNS109A – SEPTEMBER 2005 – REVISED AUGUST 2006
The B1M device uses 10 of the 16 peripheral selects to decode the base addresses of the peripherals. These
peripheral selects are fixed and transparent to the user since they are part of the decoding scheme used by the
SYS module.
Control registers for the peripherals, SYS module, and flash begin at the base addresses shown in Table 4 .
Table 4. B1M Peripherals, System Module, and Flash Base Addresses
ADDRESS RANGE
CONNECTING MODULE PERIPHERAL SELECTS
BASE ADDRESS ENDING ADDRESS
SYSTEM 0 x FFFF_FFCC 0 x FFFF_FFFF N/A
RESERVED 0 x FFFF_FF70 0 x FFFF_FFCB N/A
DWD 0xFFFF_FF60 0 x FFFF_FF6F N/A
PSA 0 x FFFF_FF40 0 x FFFF_FF5F N/A
CIM 0 x FFFF_FF20 0 x FFFF_FF3F N/A
RTI 0 x FFFF_FF00 0 x FFFF_FF1F N/A
DMA 0 x FFFF_FE80 0 x FFFF_FEFF N/A
DEC 0 x FFFF_FE00 0 x FFFF_FE7F N/A
RESERVED 0xFFFF_FD80 0xFFFF_FDFF N/A
MMC 0 x FFFF_FD00 0 x FFFF_FD7F N/A
IEM 0 x FFFF_FC00 0 x FFFF_FCFF N/A
RESERVED 0 x FFFF_Fb00 0 x FFFF_FBFF N/A
RESERVED 0 x FFFF_Fa00 0 x FFFF_FAFF N/A
DMA CMD BUFFER 0 x FFFF_F800 0 x FFFF_F9FF N/A
MSM 0xFFFF_F700 0xFFFF_F7FF N/A
RESERVED 0xFFF8_0000 0xFFFF_F6FF N/A
RESERVED 0 x FFF7_FD00 0xFFF7_FFFF
PS[0]
HET 0xFFF7_FC00 0xFFF7_FCFF
RESERVED 0xFFF7_F900 0xFFF7_FBFF
PS[1]
SPI1 0xFFF7_F800 0xFFF7_F8FF
RESERVED 0xFFF7_F700 0xFFF7_F7FF
SCI3 0xFFF7_F600 0xFFF7_F6FF
PS[2]
SCI2 0XFFF7_F500 0XFFF7_F5FF
SCI1 0xFFF7_F400 0xFFF7_F4FF
RESERVED 0xFFF7_F100 0xFFF7_F3FF
PS[3]
MibADC 0xFFF7_F000 0xFFF7_F0FF
ECP 0xFFF7_EF00 0xFFF7_EFFF
RESERVED 0xFFF7_EE00 0xFFF7_EEFF
PS[4]
EBM 0xFFF7_ED00 0xFFF7_EDFF
GIO 0xFFF7_EC00 0xFFF7_ECFF
0xFFF7_EB00 0xFFF7_EBFF
HECC2
0xFFF7_EA00 0xFFF7_EAFF
PS[5]
0xFFF7_E900 0xFFF7_E9FF
HECC1
0xFFF7_E800 0xFFF7_E8FF
0xFFF7_E700 0xFFF7_E7FF
HECC2 RAM
0xFFF7_E600 0xFFF7_E6FF
PS[6]
0xFFF7_E500 0xFFF7_E5FF
HECC1 RAM
0xFFF7_E400 0xFFF7_E4FF
RESERVED 0xFFF7_E100 0xFFF7_E3FF
PS[7]
SCC 0xFFF7_E000 0xFFF7_E0FF
18
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