Datasheet

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B1M Device-Specific Information
Memory
System Module Control
(512K Bytes)
(512K Bytes)
Peripheral Control Registers
Reserved
Flash Control Registers
Reserved
MPU Control Registers
Reserved (1 MByte)
Program
and
Data Area
Exception, Interrupt, and
Reset Vectors
SYSTEM with PSA, CIM, RTI,
DEC, DMA, MMC, DWD
IEM
MSM
Reserved
Reserved
HET
Reserved
SPI1
SCI3
SCI2
SCI1
Reserved
MibADC
ECP
Reserved
EBM
GIO
Reserved
HECC2
Reserved
HECC1
Reserved
HECC2 RAM
Reserved
HECC1 RAM
Reserved
SCC
Reserved
SCC RAM
I2C4
I2C3
I2C2
I2C1
I2C5
SPI2
Reserved
Reserved
FIQ
IRQ
Reserved
Data Abort
Prefetch Abort
Software Interrupt
Undefined Instruction
Reset
RAM
(64K Bytes)
FLASH
(1M Bytes)
2 Banks
(1K Bytes)
HET RAM
Memory (4G Bytes)
0xFFFF_FFFF
0xFFF8_0000
0xFFF7_FFFF
0xFFF0_0000
0xFFEF_FFFF
0xFFE8_C000
0xFFE8_BFFF
0xFFE8_8000
0xFFE8_7FFF
0xFFE8_4021
0xFFE8_4020
0xFFE8_4000
0xFFE0_0000
0x7FFF_FFFF
0x0000_0024
0x0000_0023
0x0000_0000
0xFFFF_FFFF
0xFFFF_FD00
0xFFFF_FC00
0xFFFF_F700
0xFFF8_0000
0xFFF7_FC00
0xFFF7_F800
0xFFF7_F600
0xFFF7_F500
0xFFF7_F400
0xFFF7_F000
0xFFF7_EF00
0xFFF7_ED00
0xFFF7_EC00
0xFFF7_EA00
0xFFF7_E800
0xFFF7_E600
0xFFF7_E400
0xFFF7_E000
0xFFF7_DC00
0xFFF7_DB00
0xFFF7_DA00
0xFFF7_D900
0xFFF7_D800
0xFFF7_D500
0xFFF7_D400
0xFFF0_0000
0x0000_0023
0x0000_0020
0x0000_001C
0x0000_0018
0x0000_0014
0x0000_0010
0x0000_000C
0x0000_0008
0x0000_0004
0x0000_0000
Registers
16 sectors
TMS470R1B1M
16/32-Bit RISC Flash Microcontroller
SPNS109A – SEPTEMBER 2005 – REVISED AUGUST 2006
Figure 1 shows the memory map of the B1M device.
A. Memory addresses are configurable by the system (SYS) module within the range of 0x0000_0000 to 0xFFE0_0000.
B. The CPU registers are not part of the memory map.
Figure 1. TMS470R1B1M Memory Map
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