Datasheet

TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145L − JULY 2000 − REVISED SEPTEMBER 2007
88
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
capture and QEP timing
CAP refers to all QEP and capture input pins.
timing requirements (see Figure 38)
MIN MAX UNIT
t
†
Pulse duration CAPx input low/high
if bit 6 of SCSR2 = 0
6t
c(CO)
ns
t
w(CAP)
†
Pulse duration, CAPx input low/high
if bit 6 of SCSR2 = 1
12t
c(CO)
ns
†
This is different from 240x devices.
CAPx
t
w(CAP)
CLKOUT
Figure 38. Capture Input and QEP Timing