Datasheet

TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145L − JULY 2000 − REVISED SEPTEMBER 2007
84
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
low-power mode timing
switching characteristics over recommended operating conditions [H = 0.5t
c(CO)
]
(see Figure 31, Figure 32, and Figure 33)
PARAMETER LOW-POWER MODES MIN TYP MAX UNIT
t
Dela
y
time
,
CLKOUT switchin
g
to
IDLE1 LPM0 12 × t
c(CO)
ns
t
d(WAKE-A)
Delay time
,
CLKOUT switching to
program execution resume
IDLE2
LPM1 15 × t
c(CO)
ns
t
d(IDLE-COH)
Delay time, Idle instruction executed to
CLKOUT high
IDLE2 LPM1 4t
c(CO)
ns
t
d(WAKE-OSC)
Delay time, wakeup interrupt
asserted to oscillator running
HALT
LPM2
OSC start-up
time
ms
t
d(IDLE-OSC)
Delay time, Idle instruction executed to
oscillator power off
HALT
{PLL/OSC power down}
LPM2
4t
c(CO)
ns
t
d(EX)
Delay time, reset vector executed after PLL lock time
36H ns
WAKE INT
†
CLKOUT
A0−A15
t
d(WAKE−A)
†
WAKE INT can be any valid interrupt or RESET.
Figure 31. IDLE1 Entry and Exit Timing − LPM0
t
d(WAKE−A)
t
d(IDLE−COH)
WAKE INT
†
CLKOUT
A0−A15
†
WAKE INT can be any valid interrupt or RESET.
Figure 32. IDLE2 Entry and Exit Timing − LPM1
t
d(EX)
t
d(IDLE−COH)
t
d(IDLE−OSC)
RESET
CLKOUT
A0−A15
t
d(WAKE−OSC)
t
w(RSL)
t
p
Figure 33. HALT Mode − LPM2