Datasheet

TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
DSP CONTROLLERS
SPRS145L − JULY 2000 − REVISED SEPTEMBER 2007
11
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
pin functions
The TMS320LF2407A device is the superset of all the 240xA devices. All signals are available on the 2407A
device. Table 2 lists the signals available in the 240xA generation of devices.
Table 2. LF240xA and LC240xA Pin List and Package Options
†‡
PIN NAME
LF2407A
(144-PGE)
2406A
(100-PZ)
LC2404A
(100-PZ)
2403A,
LC2402A
(64-PAG)
and
2402A
(64-PG)
DESCRIPTION
EVENT MANAGER A (EVA)
CAP1/QEP1/IOPA3 83 57 57 4
Capture input #1/quadrature encoder pulse input #1 (EVA) or
GPIO (↑)
CAP2/QEP2/IOPA4 79 55 55 3
Capture input #2/quadrature encoder pulse input #2 (EVA) or
GPIO (↑)
CAP3/IOPA5 75 52 52 2 Capture input #3 (EVA) or GPIO (↑)
PWM1/IOPA6 56 39 39 59 Compare/PWM output pin #1 (EVA) or GPIO (↑)
PWM2/IOPA7 54 37 37 58 Compare/PWM output pin #2 (EVA) or GPIO (↑)
PWM3/IOPB0 52 36 36 57 Compare/PWM output pin #3 (EVA) or GPIO (↑)
PWM4/IOPB1 47 33 33 54 Compare/PWM output pin #4 (EVA) or GPIO (↑)
PWM5/IOPB2 44 31 31 53 Compare/PWM output pin #5 (EVA) or GPIO (↑)
PWM6/IOPB3 40 28 28 50 Compare/PWM output pin #6 (EVA) or GPIO (↑)
T1PWM/T1CMP/IOPB4 16 12 12 40 Timer 1 compare output (EVA) or GPIO (↑)
T2PWM/T2CMP/IOPB5 18 13 13 41 Timer 2 compare output (EVA) or GPIO (↑)
TDIRA/IOPB6 14 11 11
Counting direction for general-purpose (GP) timer (EVA) or
GPIO. If TDIRA = 1, upward counting is selected. If
TDIRA = 0, downward counting is selected. (↑)
TCLKINA/IOPB7 37 26 26 49
External clock input for GP timer (EVA) or GPIO. Note that
the timer can also use the internal device clock. (↑)
EVENT MANAGER B (EVB)
CAP4/QEP3/IOPE7 88 60 60
Capture input #4/quadrature encoder pulse input #3 (EVB) or
GPIO (↑)
CAP5/QEP4/IOPF0 81 56 56
Capture input #5/quadrature encoder pulse input #4 (EVB) or
GPIO (↑)
CAP6/IOPF1 69 48 48 Capture input #6 (EVB) or GPIO (↑)
PWM7/IOPE1 65 45 45 Compare/PWM output pin #7 (EVB) or GPIO (↑)
PWM8/IOPE2 62 43 43 Compare/PWM output pin #8 (EVB) or GPIO (↑)
PWM9/IOPE3 59 41 41 Compare/PWM output pin #9 (EVB) or GPIO (↑)
PWM10/IOPE4 55 38 38 Compare/PWM output pin #10 (EVB) or GPIO (↑)
PWM11/IOPE5 46 32 32 Compare/PWM output pin #11 (EVB) or GPIO (↑)
PWM12/IOPE6 38 27 27 Compare/PWM output pin #12 (EVB) or GPIO (↑)
†
Bold, italicized pin names indicate pin function after reset.
‡
GPIO − General-purpose input/output pin. All GPIOs come up as input after reset.
§
It is highly recommended that V
CCA
be isolated from the digital supply voltage (and V
SSA
from digital ground) to maintain the specified accuracy
and improve the noise immunity of the ADC.
¶
Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high
#
No power supply pin (V
DD
, V
DDO
, V
CCA
, V
SS
, or V
SSO
) should be left unconnected. All power supply pins must be connected appropriately for
proper device operation.
LEGEND: ↑ − Internal pullup ↓ − Internal pulldown (Typical active pullup/pulldown value is ±16 µA.)