Datasheet

TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145L − JULY 2000 − REVISED SEPTEMBER 2007
107
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
10-bit analog-to-digital converter (ADC)
The 10-bit ADC has a separate power bus for its analog circuitry. These pins are referred to as V
CCA
and V
SSA
.
The power bus isolation is to enhance ADC performance by preventing digital switching noise of the logic
circuitry that can be present on V
SS
and V
CC
from coupling into the ADC analog stage. All ADC specifications
are given with respect to V
SSA
unless otherwise noted.
Resolution 10-bit (1024 values). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monotonic Assured. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output conversion mode 000h to 3FFh (000h for V
I
≤ V
REFLO
; 3FFh for V
I
≥ V
REFHI
). . . . . . . . . . . . . . . . . . . .
Minimum conversion time (including sample time) 500 ns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions
MIN NOM MAX UNIT
V
CCA
Analog supply voltage 3.0 3.3 3.6 V
V
SSA
Analog ground 0 V
V
REFHI
Analog supply reference source
† ‡
V
CCA
V
V
REFLO
Analog ground reference source
†
V
SSA
V
V
AI
Analog input voltage, ADCIN00−ADCIN07 V
REFLO
V
REFHI
V
†
V
REFHI
and V
REFLO
must be stable, within ±1/2 LSB of the required resolution, during the entire conversion time.
‡
V
REFHI
can be from 2.0 V to V
CCA
; however, the accuracy of the ADC depends on the ground bounce and noise on the target board.
ADC operating frequency
MIN MAX UNIT
ADC operating frequency 4 30 MHz