Datasheet

TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145L − JULY 2000 − REVISED SEPTEMBER 2007
102
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
external memory interface write timing (continued)
t
dis(W-D)
t
d(COH−A)W
t
d(COH−RWL)
t
su(A)W
t
d(COL−WH)
WE
STRB
t
en(D)COL
t
d(COL−WL)
t
h(A)COLW
t
d(COH−CNTL)
t
d(COH−CNTH)
CLKOUT
A[0:15]
R/W
PS, DS, IS
t
d(COH−CNTL)
t
d(COH−RWH)
t
d(COL−WL)
t
d(COL−WH)
t
h(D)W
t
su(D)W
t
en(D)COL
t
d(COL−SH)
CLKOUT
ENA_144
VIS_OE
t
h(D)W
t
d(COL−SL)
NOTE A: VIS_OE will be visible at pin 97 of LF2407A when ENA_144 is high along with BVIS bits (10,9 of WSGR register − FFFFh@I/O) set to
10 or 11. CLKOUT and VIS_OE indicate internal memory write cycles (program/data). During VIS_OE cycles, the external bus will be
driven. CLKOUT is to be used along with VIS_OE for trace capabilities.
t
su(D)W
t
d(COL−SL)
D[0:15]
t
d(COL−SH)
2H 2H
W/R
t
d(WRN)
Figure 47. Memory Interface Write/Write Timings