Datasheet

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SPRS161K − MARCH 2001 − REVISED JULY 2007
82
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
peripheral register description (continued)
Table 16. Lx2401A DSP Peripheral Register Description (Continued)
ADDR
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8
REG
ADDR
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
REG
ANALOG-TO-DIGITAL CONVERTER (ADC) REGISTERS
070A0h
—
ADC
S/W RESET
SOFT FREE
ACQ
PRESCALE3
ACQ
PRESCALE2
ACQ
PRESCALE1
ACQ
PRESCALE0
ADCCTRL1
070A0h
CONV PRE-
SCALE (CPS)
CONTIN-
UOUS RUN
INT
PRIORITY
SEQ1/2
CASCADE
— — — —
ADCCTRL1
070A1h
EVB SOC
EN SEQ1
Reset SEQ1 SOC SEQ1 SEQ1 BUSY
INT ENA
SEQ1 Mode1
INT ENA
SEQ1 Mode0
INT FLAG
SEQ1
EVA SOC
EN SEQ1
ADCCTRL2
070A1h
EXT SOC
EN SEQ1
Reset SEQ2 SOC SEQ2 SEQ2 BUSY
INT ENA
SEQ2 Mode1
INT ENA
SEQ2 Mode0
INT FLAG
SEQ2
EVB SOC
EN SEQ2
ADCCTRL2
— — — — — — — —
070A2h
—
MAXCONV2
2
MAXCONV2
1
MAXCONV2
0
MAXCONV1
3
MAXCONV1
2
MAXCONV1
1
MAXCONV1
0
MAXCONV
070A3h
CONV 3 CONV 3 CONV 3 CONV 3 CONV 2 CONV 2 CONV 2 CONV 2
CHSELSEQ1
070A3h
CONV 1 CONV 1 CONV 1 CONV 1 CONV 0 CONV 0 CONV 0 CONV 0
CHSELSEQ1
070A4h
CONV 7 CONV 7 CONV 7 CONV 7 CONV 6 CONV 6 CONV 6 CONV 6
CHSELSEQ2
070A4h
CONV 5 CONV 5 CONV 5 CONV 5 CONV 4 CONV 4 CONV 4 CONV 4
CHSELSEQ2
070A5h
CONV 11 CONV 11 CONV 11 CONV 11 CONV 10 CONV 10 CONV 10 CONV 10
CHSELSEQ3
070A5h
CONV 9 CONV 9 CONV 9 CONV 9 CONV 8 CONV 8 CONV 8 CONV 8
CHSELSEQ3
070A6h
CONV 15 CONV 15 CONV 15 CONV 15 CONV 14 CONV 14 CONV 14 CONV 14
CHSELSEQ4
070A6h
CONV 13
CONV 13 CONV 13 CONV 13 CONV 12 CONV 12 CONV 12 CONV 12
CHSELSEQ4
— — — — SEQ CNTR3 SEQ CNTR2 SEQ CNTR1 SEQ CNTR0
070A7h
SEQ2
STATE 3
SEQ2
STATE 2
SEQ2
STATE 1
SEQ2
STATE 0
SEQ1
STATE 3
SEQ1
STATE 2
SEQ1
STATE 1
SEQ1
STATE 0
AUTO_SEQ_SR
070A8h
D9 D8 D7 D6 D5 D4 D3 D2
RESULT0
070A8h
D1 D0 0 0 0 0 0 0
RESULT0
070A9h
D9 D8 D7 D6 D5 D4 D3 D2
RESULT1
070A9h
D1 D0 0 0 0 0 0 0
RESULT1
070AAh
D9 D8 D7 D6 D5 D4 D3 D2
RESULT2
070AAh
D1
D0 0 0 0 0 0 0
RESULT2
070ABh
D9 D8 D7 D6 D5 D4 D3 D2
RESULT3
070ABh
D1 D0 0 0 0 0 0 0
RESULT3
070ACh
D9 D8 D7 D6 D5 D4 D3 D2
RESULT4
070ACh
D1
D0 0 0 0 0 0 0
RESULT4
070ADh
D9 D8 D7 D6 D5 D4 D3 D2
RESULT5
070ADh
D1 D0 0 0 0 0 0 0
RESULT5
070AEh
D9 D8 D7 D6 D5 D4 D3 D2
RESULT6
070AEh
D1 D0 0 0 0 0 00 0
RESULT6
070AFh
D9 D8 D7 D6 D5 D4 D3 D2
RESULT7
070AFh
D1 D0 0 0 0 0 0 0
RESULT7
These bits are not applicable in the Lx2401A since either (i) the peripheral functionality is absent or (ii) the cor-
responding pins have not been bonded out of the device.