Datasheet
SPRS161K − MARCH 2001 − REVISED JULY 2007
60
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
current consumption graphs
0
10
20
30
40
50
60
70
80
90
100
0 5 10 15 20 25 30 35 40 45
CLKOUT Frequency (MHz)
Current (mA)
I
DD
Figure 21. LF2401A Typical Current Consumption (With Peripheral Clocks Enabled)
reducing current consumption
240x DSPs incorporate a unique method to reduce the device current consumption. A reduction in current
consumption can be achieved by turning off the clock to any peripheral module which is not used in a given
application. Table 15 indicates the typical reduction in current consumption achieved by turning off the clocks
to various peripherals. Refer to the TMS320LF/LC240xA DSP Controllers Reference Guide: System and
Peripherals (literature number SPRU357) for further information on how to turn off the clock to the peripherals.
Table 15. Typical Current Consumption by Various Peripherals (at 40 MHz)
PERIPHERAL MODULE CURRENT REDUCTION (mA)
EVA 6.1
ADC
†
2.8
†
SCI
1.9
†
ADC current shown is at 30 MHz.
emulator connection without signal buffering for the DSP
Figure 22 shows the connection between the DSP and JTAG header for a single-processor configuration. If the
distance between the JTAG header and the DSP is greater than 6 inches, the emulation signals must be
buffered. If the distance is less than 6 inches, buffering is typically not needed. Figure 22 shows the simpler,
no-buffering situation. For the pullup/pulldown resistor values, see the pin description section. For details on
buffering JTAG signals and multiple processor connections, see TMS320F/C24x DSP Controllers CPU and
Instruction Set Reference Guide (literature number SPRU160).