Datasheet
TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
www.ti.com
SPRS439M –JUNE 2007–REVISED AUGUST 2012
• One interrupt that can be used by the CPU. This interrupt can be generated as a result of one of the
following conditions:
– Transmit-data ready
– Receive-data ready
– Register-access ready
– No-acknowledgment received
– Arbitration lost
– Stop condition detected
– Addressed as slave
• An additional interrupt that can be used by the CPU when in FIFO mode
• Module-enable and module-disable capability
• Free data format mode
The registers in Table 4-14 configure and control the I2C port operation.
Table 4-14. I2C-A Registers
NAME ADDRESS DESCRIPTION
I2COAR 0x7900 I2C own address register
I2CIER 0x7901 I2C interrupt enable register
I2CSTR 0x7902 I2C status register
I2CCLKL 0x7903 I2C clock low-time divider register
I2CCLKH 0x7904 I2C clock high-time divider register
I2CCNT 0x7905 I2C data count register
I2CDRR 0x7906 I2C data receive register
I2CSAR 0x7907 I2C slave address register
I2CDXR 0x7908 I2C data transmit register
I2CMDR 0x7909 I2C mode register
I2CISRC 0x790A I2C interrupt source register
I2CPSC 0x790C I2C prescaler register
I2CFFTX 0x7920 I2C FIFO transmit register
I2CFFRX 0x7921 I2C FIFO receive register
I2CRSR – I2C receive shift register (not accessible to the CPU)
I2CXSR – I2C transmit shift register (not accessible to the CPU)
4.13 GPIO MUX
On the 2833x/2823x devices, the GPIO MUX can multiplex up to three independent peripheral signals on
a single GPIO pin in addition to providing individual pin bit-banging I/O capability. The GPIO MUX block
diagram per pin is shown in Figure 4-18. Because of the open drain capabilities of the I2C pins, the GPIO
MUX block diagram for these pins differ. See the TMS320x2833x, 2823x System Control and Interrupts
Reference Guide (literature number SPRUFB0 ) for details.
NOTE
There is a 2-SYSCLKOUT cycle delay from when the write to the GPxMUXn and GPxQSELn
registers occurs to when the action is valid.
Copyright © 2007–2012, Texas Instruments Incorporated Peripherals 99
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