Datasheet

TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439M –JUNE 2007–REVISED AUGUST 2012 www.ti.com
The eCAP modules are clocked at the SYSCLKOUT rate.
The clock enable bits (ECAP1ENCLK, ECAP2ENCLK, ECAP3ENCLK, ECAP4ENCLK, ECAP5ENCLK,
ECAP6ENCLK) in the PCLKCR1 register are used to turn off the eCAP modules individually (for low
power operation). Upon reset, ECAP1ENCLK, ECAP2ENCLK, ECAP3ENCLK, ECAP4ENCLK,
ECAP5ENCLK, and ECAP6ENCLK are set to low, indicating that the peripheral clock is off.
Table 4-4. eCAP Control and Status Registers
SIZE
NAME eCAP1 eCAP2 eCAP3 eCAP4 eCAP5 eCAP6 DESCRIPTION
(x16)
TSCTR 0x6A00 0x6A20 0x6A40 0x6A60 0x6A80 0x6AA0 2 Time-Stamp Counter
CTRPHS 0x6A02 0x6A22 0x6A42 0x6A62 0x6A82 0x6AA2 2 Counter Phase Offset Value
Register
CAP1 0x6A04 0x6A24 0x6A44 0x6A64 0x6A84 0x6AA4 2 Capture 1 Register
CAP2 0x6A06 0x6A26 0x6A46 0x6A66 0x6A86 0x6AA6 2 Capture 2 Register
CAP3 0x6A08 0x6A28 0x6A48 0x6A68 0x6A88 0x6AA8 2 Capture 3 Register
CAP4 0x6A0A 0x6A2A 0x6A4A 0x6A6A 0x6A8A 0x6AAA 2 Capture 4 Register
Reserved 0x6A0C- 0x6A2C- 0x6A4C- 0x6A6C- 0x6A8C- 0x6AAC- 8 Reserved
0x6A12 0x6A32 0x6A52 0x6A72 0x6A92 0x6AB2
ECCTL1 0x6A14 0x6A34 0x6A54 0x6A74 0x6A94 0x6AB4 1 Capture Control Register 1
ECCTL2 0x6A15 0x6A35 0x6A55 0x6A75 0x6A95 0x6AB5 1 Capture Control Register 2
ECEINT 0x6A16 0x6A36 0x6A56 0x6A76 0x6A96 0x6AB6 1 Capture Interrupt Enable Register
ECFLG 0x6A17 0x6A37 0x6A57 0x6A77 0x6A97 0x6AB7 1 Capture Interrupt Flag Register
ECCLR 0x6A18 0x6A38 0x6A58 0x6A78 0x6A98 0x6AB8 1 Capture Interrupt Clear Register
ECFRC 0x6A19 0x6A39 0x6A59 0x6A79 0x6A99 0x6AB9 1 Capture Interrupt Force Register
Reserved 0x6A1A- 0x6A3A- 0x6A5A- 0x6A7A- 0x6A9A- 0x6ABA- 6 Reserved
0x6A1F 0x6A3F 0x6A5F 0x6A7F 0x6A9F 0x6ABF
74 Peripherals Copyright © 2007–2012, Texas Instruments Incorporated
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