Datasheet

TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
www.ti.com SPRS439M –JUNE 2007–REVISED AUGUST 2012
The general operation of the timer is as follows: The 32-bit counter register "TIMH:TIM" is loaded with the
value in the period register "PRDH:PRD". The counter register decrements at the SYSCLKOUT rate of the
C28x. When the counter reaches 0, a timer interrupt output signal generates an interrupt pulse. The
registers listed in Table 4-1 are used to configure the timers. For more information, see the
TMS320x2833x, 2823x System Control and Interrupts Reference Guide (literature number SPRUFB0).
Table 4-1. CPU-Timers 0, 1, 2 Configuration and Control Registers
NAME ADDRESS SIZE (x16) DESCRIPTION
TIMER0TIM 0x0C00 1 CPU-Timer 0, Counter Register
TIMER0TIMH 0x0C01 1 CPU-Timer 0, Counter Register High
TIMER0PRD 0x0C02 1 CPU-Timer 0, Period Register
TIMER0PRDH 0x0C03 1 CPU-Timer 0, Period Register High
TIMER0TCR 0x0C04 1 CPU-Timer 0, Control Register
Reserved 0x0C05 1
TIMER0TPR 0x0C06 1 CPU-Timer 0, Prescale Register
TIMER0TPRH 0x0C07 1 CPU-Timer 0, Prescale Register High
TIMER1TIM 0x0C08 1 CPU-Timer 1, Counter Register
TIMER1TIMH 0x0C09 1 CPU-Timer 1, Counter Register High
TIMER1PRD 0x0C0A 1 CPU-Timer 1, Period Register
TIMER1PRDH 0x0C0B 1 CPU-Timer 1, Period Register High
TIMER1TCR 0x0C0C 1 CPU-Timer 1, Control Register
Reserved 0x0C0D 1
TIMER1TPR 0x0C0E 1 CPU-Timer 1, Prescale Register
TIMER1TPRH 0x0C0F 1 CPU-Timer 1, Prescale Register High
TIMER2TIM 0x0C10 1 CPU-Timer 2, Counter Register
TIMER2TIMH 0x0C11 1 CPU-Timer 2, Counter Register High
TIMER2PRD 0x0C12 1 CPU-Timer 2, Period Register
TIMER2PRDH 0x0C13 1 CPU-Timer 2, Period Register High
TIMER2TCR 0x0C14 1 CPU-Timer 2, Control Register
Reserved 0x0C15 1
TIMER2TPR 0x0C16 1 CPU-Timer 2, Prescale Register
TIMER2TPRH 0x0C17 1 CPU-Timer 2, Prescale Register High
Reserved 0x0C18 – 0x0C3F 40
Copyright © 2007–2012, Texas Instruments Incorporated Peripherals 67
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TMS320F28232