Datasheet
TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439M –JUNE 2007–REVISED AUGUST 2012
www.ti.com
4 Peripherals
The integrated peripherals of the 2833x/2823x devices are described in the following subsections:
• 6-channel Direct Memory Access (DMA)
• Three 32-bit CPU-Timers
• Up to six enhanced PWM modules (ePWM1, ePWM2, ePWM3, ePWM4, ePWM5, ePWM6)
• Up to six enhanced capture modules (eCAP1, eCAP2, eCAP3, eCAP4, eCAP5, eCAP6)
• Up to two enhanced QEP modules (eQEP1, eQEP2)
• Enhanced analog-to-digital converter (ADC) module
• Up to two enhanced controller area network (eCAN) modules (eCAN-A, eCAN-B)
• Up to three serial communications interface modules (SCI-A, SCI-B, SCI-C)
• One serial peripheral interface (SPI) module (SPI-A)
• Inter-integrated circuit module (I2C)
• Up to two multichannel buffered serial port (McBSP-A, McBSP-B) modules
• Digital I/O and shared pin functions
• External Interface (XINTF)
4.1 DMA Overview
Features:
• 6 Channels with independent PIE interrupts
• Trigger Sources:
– ePWM SOCA/SOCB
– ADC Sequencer 1 and Sequencer 2
– McBSP-A and McBSP-B transmit and receive logic
– XINT1–7 and XINT13
– CPU Timers
– Software
• Data Sources/Destinations:
– L4–L7 16K × 16 SARAM
– All XINTF zones
– ADC Memory Bus mapped RESULT registers
– McBSP-A and McBSP-B transmit and receive buffers
– ePWM registers
• Word Size: 16-bit or 32-bit (McBSPs limited to 16-bit)
• Throughput: 4 cycles/word (5 cycles/word for McBSP reads)
64 Peripherals Copyright © 2007–2012, Texas Instruments Incorporated
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Product Folder Link(s): TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234
TMS320F28232