Datasheet

L0SARAM4Kx16
(0-Wait,DualMap)
L1SARAM4Kx16
(0-Wait,DualMap)
L2SARAM4Kx16
(0-Wait,DualMap)
L3SARAM4Kx16
(0-Wait,DualMap)
M0SARAM1Kx16
(0-Wait)
M1SARAM1Kx16
(0-Wait)
L4SARAM4Kx16
(0-WData,1-WProg)
L5SARAM4Kx16
(0-WData,1-WProg)
L6SARAM4Kx16
(0-WData,1-WProg)
L7SARAM4Kx16
(0-WData,1-WProg)
MemoryBus
BootROM
8Kx16
Code
Security
Module
DMA Bus
PSWD
OTP 1Kx16
Flash
256Kx16
8Sectors
Pump
Flash
Wrapper
TEST1
TEST2
XINTF
XA0/XWE1
XWE0
XZCS6
XZCS7
XZCS0
XR/W
XREADY
XHOLD
XHOLDA
XD31:0
XA19:1
GPIO
MUX
MemoryBus
MemoryBus
XCLKOUT
XRD
GPIO
MUX
88GPIOs
8ExternalInterrupts
88GPIOs
12-Bit
ADC
2-S/H
A7:0
B7:0
CPUTimer0
CPUTimer1
CPUTimer2
OSC,
PLL,
LPM,
WD
DMA
6Ch
PIE
(Interrupts)
32-bitCPU
(150MHZ@1.9V)
(100MHz@1.8V)
EMU1
EMU0
TRST
TDO
TMS
TDI
TCK
XRS
X2
X1
XCLKIN
FPU
REFIN
DMA Bus
MemoryBus
FIFO
(16Levels)
SCI-A/B/C
FIFO
(16Levels)
SPI-A
FIFO
(16Levels)
I2C
16-bitperipheralbus
SPISOMIx SPISIMOx
SPICLKx
SPISTEx
SCIRXDx
SCITXDx
SDAx
SCLx
McBSP-A/B
MRXx
MDXx
MCLKXx
MCLKRx
MFSXx
MFSRx
32-bitperipheralbus
(DMA accessible)
ePWM-1/../6
HRPWM-1/../6
eCAP-1/../6
eQEP-1/2
EPWMxA EPWMxB
ESYNCI
ESYNCO
TZx
ECAPx
EQEPxA EQEPxB
EQEPxI
EQEPxS
CAN-A/B
(32-mbox)
CANRXx
CANTXx
32-bitperipheralbus
GPIOMUX
88GPIOs
XINTF
Securezone
TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
www.ti.com SPRS439M –JUNE 2007–REVISED AUGUST 2012
3 Functional Overview
Figure 3-1. Functional Block Diagram
Copyright © 2007–2012, Texas Instruments Incorporated Functional Overview 33
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Product Folder Link(s): TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234
TMS320F28232