Datasheet

TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
www.ti.com
SPRS439M JUNE 2007REVISED AUGUST 2012
Table 2-3. Signal Descriptions (continued)
PIN NO.
PGF,
NAME DESCRIPTION
(1)
ZHH ZJZ
PTP
BALL # BALL #
PIN #
Internal Reference Positive Output. Requires a low ESR (under 1.5 ) ceramic bypass
capacitor of 2.2 μF to analog ground. (O)
ADCREFP 56 P5 P5
NOTE: Use the ADC Clock rate to derive the ESR specification from the capacitor data
sheet that is used in the system.
Internal Reference Medium Output. Requires a low ESR (under 1.5 ) ceramic bypass
capacitor of 2.2 μF to analog ground. (O)
ADCREFM 55 N5 P4
NOTE: Use the ADC Clock rate to derive the ESR specification from the capacitor data
sheet that is used in the system.
CPU AND I/O POWER PINS
V
DDA2
34 K2 K4 ADC Analog Power Pin
V
SSA2
33 K3 P1 ADC Analog Ground Pin
V
DDAIO
45 N2 L5 ADC Analog I/O Power Pin
V
SSAIO
44 P1 N1 ADC Analog I/O Ground Pin
V
DD1A18
31 J4 K3 ADC Analog Power Pin
V
SS1AGND
32 K1 L4 ADC Analog Ground Pin
V
DD2A18
59 M6 L6 ADC Analog Power Pin
V
SS2AGND
58 K6 P2 ADC Analog Ground Pin
V
DD
4 B1 D4
V
DD
15 B5 D5
V
DD
23 B11 D8
V
DD
29 C8 D9
V
DD
61 D13 E11
V
DD
101 E9 F4
V
DD
109 F3 F11 CPU and Logic Digital Power Pins
V
DD
117 F13 H4
V
DD
126 H1 J4
V
DD
139 H12 J11
V
DD
146 J2 K11
V
DD
154 K14 L8
V
DD
167 N6
V
DDIO
9 A4 A13
V
DDIO
71 B10 B1
V
DDIO
93 E7 D7
V
DDIO
107 E12 D11
V
DDIO
121 F5 E4 Digital I/O Power Pin
V
DDIO
143 L8 G4
V
DDIO
159 H11 G11
V
DDIO
170 N14 L10
V
DDIO
N14
Copyright © 2007–2012, Texas Instruments Incorporated Introduction 25
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