Datasheet

1
0
/2
SYSCLKOUT
C28x
CPU
XINTCNF2(XTIMCLK)
1
0
/2
XTIMCLK
XINTCNF2
(CLKMODE)
XINTCNF2
(CLKOFF)
0
1
0
XCLKOUT
XTIMING0
XTIMING6
XTIMING7
XBANK
LEAD/ACTIVE/TRAIL
PCLKR3[XINTFENCLK]
TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439M JUNE 2007REVISED AUGUST 2012
www.ti.com
Unless otherwise specified, all XINTF timing is applicable for the clock configurations shown in Table 6-37.
Table 6-37. XINTF Clock Configurations
MODE SYSCLKOUT XTIMCLK XCLKOUT
1 SYSCLKOUT SYSCLKOUT
Example: 150 MHz 150 MHz 150 MHz
2 SYSCLKOUT 1/2 SYSCLKOUT
Example: 150 MHz 150 MHz 75 MHz
3 1/2 SYSCLKOUT 1/2 SYSCLKOUT
Example: 150 MHz 75 MHz 75 MHz
4 1/2 SYSCLKOUT 1/4 SYSCLKOUT
Example: 150 MHz 75 MHz 37.5 MHz
The relationship between SYSCLKOUT and XTIMCLK is shown in Figure 6-22.
Figure 6-22. Relationship Between XTIMCLK and SYSCLKOUT
154 Electrical Specifications Copyright © 2007–2012, Texas Instruments Incorporated
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TMS320F28232