Datasheet

XNMI, XINT1, XINT2
t
w(INT)
Interrupt Vector
t
d(INT)
Address bus
(internal)
ADCSOCAO
or
ADCSOCBO
t
w(ADCSOCL)
TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439M –JUNE 2007–REVISED AUGUST 2012 www.ti.com
6.10.6 ADC Start-of-Conversion Timing
Table 6-28. External ADC Start-of-Conversion Switching Characteristics
PARAMETER MIN MAX UNIT
t
w(ADCSOCL)
Pulse duration, ADCSOCxO low 32t
c(HCO )
cycles
Figure 6-16. ADCSOCAO or ADCSOCBO Timing
6.11 External Interrupt Timing
Figure 6-17. External Interrupt Timing
Table 6-29. External Interrupt Timing Requirements
(1)
TEST CONDITIONS MIN MAX UNIT
t
w(INT)
(2)
Pulse duration, INT input low/high Synchronous 1t
c(SCO)
cycles
With qualifier 1t
c(SCO)
+ t
w(IQSW)
cycles
(1) For an explanation of the input qualifier parameters, see Table 6-13.
(2) This timing is applicable to any GPIO pin configured for ADCSOC functionality.
Table 6-30. External Interrupt Switching Characteristics
(1)
PARAMETER MIN MAX UNIT
t
d(INT)
Delay time, INT low/high to interrupt-vector fetch t
w(IQSW)
+ 12t
c(SCO)
cycles
(1) For an explanation of the input qualifier parameters, see Table 6-13.
142 Electrical Specifications Copyright © 2007–2012, Texas Instruments Incorporated
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