Datasheet

XD[31:0]
XA[19:0]
XZCS0
XZCS6
XZCS7
XINTF Zone 0
(8K x 16)
0x0030-0000
0x0020-0000
0x0010-0000
0x0000-5000
0x0000-4000
0x0000-0000
Data Space Prog Space
XINTF Zone 6
(1M x 16)
XWE0
XR/W
XREADY
XHOLD
XHOLDA
XCLKOUT
XRD
XA0/XWE1
XINTF Zone 7
(1M x 16)
TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
SPRS439M –JUNE 2007–REVISED AUGUST 2012 www.ti.com
4.14 External Interface (XINTF)
This section gives a top-level view of the external interface (XINTF) that is implemented on the
2833x/2823x devices.
The XINTF is a non-multiplexed asynchronous bus, similar to the 2812 XINTF. The XINTF is mapped into
three fixed zones shown in Figure 4-20 .
A. Each zone can be programmed with different wait states, setup and hold timings, and is supported by zone chip
selects that toggle when an access to a particular zone is performed. These features enable glueless connection to
many external memories and peripherals.
B. Zones 1 – 5 are reserved for future expansion.
C. Zones 0, 6, and 7 are always enabled.
Figure 4-20. External Interface Block Diagram
Figure 4-21 and Figure 4-22 show typical 16-bit and 32-bit data bus XINTF connections, illustrating how
the functionality of the XA0 and XWE1 signals change, depending on the configuration. Table 4-19 defines
XINTF configuration and control registers.
106 Peripherals Copyright © 2007–2012, Texas Instruments Incorporated
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