Datasheet

TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
www.ti.com SPRS698D –NOVEMBER 2010–REVISED DECEMBER 2012
6 Revision History
This data sheet revision history highlights the technical changes made to the SPRS698C device-specific
data sheet to make it an SPRS698D revision.
Scope: The TMS320F2806xU devices are now "TMS" devices (fully qualified production devices). See
Section 3.3 for more information on device status.
Information/data on TMS320F2806xU devices are now Production Data.
PRODUCTION DATA information is current as of publication date. Products conform to
specifications per the terms of the Texas Instruments standard warranty. Production processing
does not necessarily include testing of all parameters.
Q-temperature devices are "TMX" devices (experimental devices). See Section 3.3 for more
information on device status.
The "Q" temperature option (–40°C to 125°C) is not available on the TMS320F2806xU
devices.
See table below.
LOCATION ADDITIONS, DELETIONS, AND MODIFICATIONS
Table 2-1 Hardware Features:
• Changed "ePWM outputs" for the 100-Pin PZ and PZP packages for all devices from 19 to 16
• Changed "ePWM outputs" for the 80-Pin PN and PFP packages for all devices from 15 to 14
• Updated "Product status" row
• Added "Product status for Q-temperature devices" row
• Added "The "Q" temperature option is not available on the TMS320F2806xU devices" footnote
• Added footnote about "TMX" product status
Table 2-8 Peripheral Frame 0 Registers:
• PIE Vector Table: Changed "EALLOW PROTECTED" value from "No" to "Yes"
Table 2-12 Device Emulation Registers:
• Removed "For TMS320F28069U devices, the PARTID and CLASSID numbers are also used for TMX
devices. In the case of TMX320F28069UPFPA and TMX320F28069UPZPA devices, the temperature rating is
'A' instead of 'T'" footnote
Table 2-15 PLL Settings:
• Added data for PLLCR[DIV] VALUE = 10001
• Added data for PLLCR[DIV] VALUE = 10010
Table 2-17 Possible PLL Configuration Modes:
• Removed "PLLSTS[DIVSEL] should not be set to /1 mode while the PLL is enabled" footnote
Figure 3-1 Device Nomenclature:
• Added "The "Q" temperature option is not available on the 2806xU devices" footnote
Section 4.2 Recommended Operating Conditions:
• Changed "V
DDIO
and V
DDA
should be maintained within ~0.3 V of each other" footnote to "V
DDIO
and V
DDA
should be maintained within approximately 0.3 V of each other"
• Added "The "Q" temperature option is not available on the 2806xU devices" footnote
Table 5-2 Device Clocking Requirements/Characteristics:
• External oscillator/clock source (XCLKIN pin) — PLL Disabled:
– t
c(CI)
, Cycle time (C8): Changed MIN value from 33.33 ns to 11.11 ns
– Frequency: Changed MAX value from 30 MHz to 90 MHz
Table 5-5 XCLKIN Timing Requirements - PLL Disabled:
• C9, t
f(CI)
: Changed frequency range from "20 MHz to 30 MHz" to "20 MHz to 90 MHz"
• C10, t
r(CI)
: Changed frequency range from "20 MHz to 30 MHz" to "20 MHz to 90 MHz"
Section 5.5 Power Sequencing:
• Removed "Furthermore, V
DDIO
and V
DDA
should always be within 0.3 V of each other" sentence from "There
is no power sequencing requirement needed ..." paragraph
Copyright © 2010–2012, Texas Instruments Incorporated Revision History 157
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Product Folder Links: TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065
TMS320F28064 TMS320F28063 TMS320F28062