Datasheet

Settling Time (ns)
0
100
200
300
400
500
600
700
800
900
1000
1100
0 50 100 150 200 250 300 350 400 450 500
DAC Step Size (Codes)
15 Codes 7 Codes 3 Codes 1 Code
DAC Accuracy
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
www.ti.com SPRS698D –NOVEMBER 2010–REVISED DECEMBER 2012
5.10.3.1 On-Chip Comparator/DAC Electrical Data/Timing
Table 5-26. Electrical Characteristics of the Comparator/DAC
CHARACTERISTIC MIN TYP MAX UNITS
Comparator
Comparator Input Range V
SSA
– V
DDA
V
Comparator response time to PWM Trip Zone (Async) 30 ns
Input Offset ±5 mV
Input Hysteresis
(1)
35 mV
DAC
DAC Output Range V
SSA
– V
DDA
V
DAC resolution 10 bits
DAC settling time See Figure 5-25
DAC Gain –1.5 %
DAC Offset 10 mV
Monotonic Yes
INL ±3 LSB
(1) Hysteresis on the comparator inputs is achieved with a Schmidt trigger configuration. This results in an effective 100-kΩ feedback
resistance between the output of the comparator and the non-inverting input of the comparator.
Figure 5-25. DAC Settling Time
Copyright © 2010–2012, Texas Instruments Incorporated Peripheral and Electrical Specifications 95
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TMS320F28064 TMS320F28063 TMS320F28062