Datasheet

Conversion 0
13 ADC Clocks
Minimum
7 ADCCLKs
SOC0
ADCCLK
ADCRESULT 0
S/H Window Pulse to Core
ADCCTL1.INTPULSEPOS
ADCSOCFLG 1.SOC0
ADCINTFLG.ADCINTx
SOC1 SOC2
9 15 22 24 37
6
ADCCLKs
20
Result 0 Latched
Conversion 1
13 ADC Clocks
Minimum
7 ADCCLKs
ADCSOCFLG 1.SOC1
ADCSOCFLG 1.SOC2
ADCRESULT 1
EOC0 Pulse
EOC1 Pulse
EOC2 Pulse
2 ADCCLKs
Analog Input
SOC1 Sample
Window
SOC0 Sample
Window
SOC2 Sample
Window
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698D –NOVEMBER 2010–REVISED DECEMBER 2012 www.ti.com
Figure 5-20. Timing Example for Sequential Mode / Early Interrupt Pulse
90 Peripheral and Electrical Specifications Copyright © 2010–2012, Texas Instruments Incorporated
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Product Folder Links: TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065
TMS320F28064 TMS320F28063 TMS320F28062