Datasheet
0
100
200
300
400
500
600
700
800
900
10 20 30 40 50 60 70 80 90
Operational Power (mW)
SYSCLKOUT (MHz)
Operational Power vs Frequency (Internal VREG)
0
50
100
150
200
250
10 20 30 40 50 60 70 80 90
Operational Current (mA)
SYSCLKOUT (MHz)
Operational Current (Flash) vs Frequency (Internal VREG)
IDDIO
IDDA
IDD3VFL
Total
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698D –NOVEMBER 2010–REVISED DECEMBER 2012
www.ti.com
Following are other methods to reduce power consumption further:
• The flash module may be powered down if code is run off SARAM. This results in a current reduction
of 18 mA (typical) in the V
DD
rail and 13 mA (typical) in the V
DDIO
rail.
• Savings in I
DDIO
may be realized by disabling the pullups on pins that assume an output function.
5.6.2 Current Consumption Graphs (VREG Enabled)
Figure 5-7. Typical Operational Current Versus Frequency
Figure 5-8. Typical Operational Power Versus Frequency
72 Peripheral and Electrical Specifications Copyright © 2010–2012, Texas Instruments Incorporated
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