Datasheet
TRST
1
0
C28x
Core
TCK/GPIO38
TCK
XCLKIN
GPIO38_in
GPIO38_out
TDO
GPIO37_out
TDO/GPIO37
GPIO37_in
1
0
TMS
TMS/GPIO36
GPIO36_out
GPIO36_in
1
1
0
TDI
TDI/GPIO35
GPIO35_out
GPIO35_in
1
TRST
TRST
=0:JTAGDisabled(GPIOMode)
=1:JTAGMode
TRST
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584J –APRIL 2009–REVISED OCTOBER 2013
www.ti.com
4.13 JTAG Port
On the 2803x device, the JTAG port is reduced to 5 pins (TRST, TCK, TDI, TMS, TDO). TCK, TDI, TMS
and TDO pins are also GPIO pins. The TRST signal selects either JTAG or GPIO operating mode for the
pins in Figure 4-17. During emulation/debug, the GPIO function of these pins are not available. If the
GPIO38/TCK/XCLKIN pin is used to provide an external clock, an alternate clock source should be used
to clock the device during emulation/debug since this pin will be needed for the TCK function.
NOTE
In 2803x devices, the JTAG pins may also be used as GPIO pins. Care should be taken in
the board design to ensure that the circuitry connected to these pins do not affect the
emulation capabilities of the JTAG pin function. Any circuitry connected to these pins should
not prevent the emulator from driving (or being driven by) the JTAG pins for successful
debug.
Figure 4-17. JTAG/GPIO Multiplexing
94 Peripherals Copyright © 2009–2013, Texas Instruments Incorporated
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TMS320F28035