Datasheet
TXFIFO_0
LSPCLK
WUT
FrameFormatandMode
Even/Odd Enable
Parity
SCIRXInterruptselectlogic
BRKDT
RXRDY
SCIRXST.6
SCICTL1.3
8
SCICTL2.1
RX/BKINTENA
SCIRXD
SCIRXST.1
TXENA
SCITXInterruptselectlogic
TXEMPTY
TXRDY
SCICTL2.0
TXINTENA
SCITXD
RXENA
SCIRXD
RXWAKE
SCICTL1.6
RXERRINTENA
TXWAKE
SCITXD
SCICCR.6SCICCR.5
SCITXBUF.7-0
SCIHBAUD.15-8
BaudRate
MSbyte
Register
SCILBAUD.7-0
Transmitter-Data
BufferRegister
8
SCICTL2.6
SCICTL2.7
BaudRate
LSbyte
Register
RXSHF
Register
TXSHF
Register
SCIRXST.5
1
TXFIFO_1
-----
TXFIFO_3
8
TXFIFOregisters
TXFIFO
TXInterrupt
Logic
TXINT
SCIFFTX.14
RXFIFO_3
SCIRXBUF.7-0
ReceiveData
Bufferregister
SCIRXBUF.7-0
-----
RXFIFO_1
RXFIFO_0
8
RXFIFOregisters
SCICTL1.0
RXInterrupt
Logic
RXINT
RXFIFO
SCIFFRX.15
RXFFOVF
RXError
SCIRXST.7
PEFE OE
RXError
SCIRXST.4-2
ToCPU
ToCPU
AutoBaudDetectlogic
SCICTL1.1
SCIFFENA
Interrupts
Interrupts
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584J –APRIL 2009–REVISED OCTOBER 2013
www.ti.com
For more information on the SCI, see the TMS320x2802x, 2803x Piccolo Serial Communications Interface
(SCI) Reference Guide (literature number SPRUGH1).
Figure 4-7 shows the SCI module block diagram.
Figure 4-7. Serial Communications Interface (SCI) Module Block Diagram
70 Peripherals Copyright © 2009–2013, Texas Instruments Incorporated
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Product Folder Links: TMS320F28030 TMS320F28031 TMS320F28032 TMS320F28033 TMS320F28034
TMS320F28035