Datasheet

CLA_INT1toCLA_INT8
MVECT1
MIFR
MIER
MIFRC
MVECT2
MIRUN
MPERINT1
to
MPERINT8
PIE
Main
28x
CPU
CLA
Program
Memory
MMEMCFG
MR0(32)
MPC(12)
MR1(32)
MR3(32)
MAR0(32)
MSTF(32)
MR2(32)
MAR1(32)
MIOVF
MICLR
MCTL
MICLROVF
MPISRCSEL1
MVECT3
MVECT4
MVECT5
MVECT6
MVECT7
MVECT8
Main CPU BUS
INT11
INT12
PeripheralInterrupts
ADCINT1to
ADCINT8
EPWM1_INT to
INT
EPWM8_INT
CPUTimer0
MaptoCLA or
CPUSpace
CLA
Data
Memory
Comparator
Registers
ePWM
and
HRPWM
Registers
ADC
Result
Registers
CLA
Shared
Message
RAMs
MainCPURead/WriteDataBus
CLA DataRead AddressBus
CLA DataWriteDataBus
CLA DataWrite AddressBus
CLA DataReadDataBus
CLA Program AddressBus
CLA ProgramDataBus
MEALLOW
MainCPUReadDataBus
MaptoCLA or
CPUSpace
CLA DataBus
MainCPUBus
CLA Execution
Registers
CLA Control
Registers
SYSCLKOUT
CLAENCLK
SYSRS
LVF
LUF
IACK
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
www.ti.com SPRS584J –APRIL 2009–REVISED OCTOBER 2013
Figure 4-1. CLA Block Diagram
Copyright © 2009–2013, Texas Instruments Incorporated Peripherals 57
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TMS320F28035