Datasheet

PCLKCR0/1/3
(System Ctrl Regs)
LOSPCP
(System Ctrl Regs)
Peripheral
Registers
SPI-A, SPI-B, SCI-A
I/O
PF2
Clock Enables LSPCLK
SYSCLKOUT
Clock Enables
Peripheral
Registers
eCAN-A, LIN-A
I/O
PF1
Clock Enables
Clock Enables
Peripheral
Registers
eCAP1, eQEP1, HRCAP1/2
I/O
PF1
Clock Enables
Clock Enables
Peripheral
Registers
ePWM1/.../7, HRPWM1/.../7
I/O
PF3
Clock Enables
Clock Enables
Peripheral
Registers
I2C-A
I/O
PF2
Clock Enables
Clock Enables
ADC
Registers
12-Bit ADC16 Ch
PF2
Clock Enables
PF0
Clock Enables
COMP
Registers
COMP1/2/3
PF3
Clock Enables
6
GPIO
Mux
Analog
GPIO
Mux
C28x Core
CLKIN
/2
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584J –APRIL 2009–REVISED OCTOBER 2013 www.ti.com
Figure 3-8 shows the various clock domains that are discussed. Figure 3-9 shows the various clock
sources (both internal and external) that can provide a clock for device operation.
A. CLKIN is the clock into the CPU. It is passed out of the CPU as SYSCLKOUT (that is, CLKIN is the same frequency
as SYSCLKOUT).
Figure 3-8. Clock and Reset Domains
48 Functional Overview Copyright © 2009–2013, Texas Instruments Incorporated
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TMS320F28035