Datasheet

TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
www.ti.com SPRS584J –APRIL 2009–REVISED OCTOBER 2013
3.7 System Control
This section describes the oscillator and clocking mechanisms, the watchdog function and the low power
modes.
Table 3-16. PLL, Clocking, Watchdog, and Low-Power Mode Registers
NAME ADDRESS SIZE (x16) DESCRIPTION
(1)
BORCFG 0x00 0985 1 BOR Configuration Register
XCLK 0x00 7010 1 XCLKOUT Control
PLLSTS 0x00 7011 1 PLL Status Register
CLKCTL 0x00 7012 1 Clock Control Register
PLLLOCKPRD 0x00 7013 1 PLL Lock Period
INTOSC1TRIM 0x00 7014 1 Internal Oscillator 1 Trim Register
INTOSC2TRIM 0x00 7016 1 Internal Oscillator 2 Trim Register
LOSPCP 0x00 701B 1 Low-Speed Peripheral Clock Prescaler Register
PCLKCR0 0x00 701C 1 Peripheral Clock Control Register 0
PCLKCR1 0x00 701D 1 Peripheral Clock Control Register 1
LPMCR0 0x00 701E 1 Low Power Mode Control Register 0
PCLKCR3 0x00 7020 1 Peripheral Clock Control Register 3
PLLCR 0x00 7021 1 PLL Control Register
SCSR 0x00 7022 1 System Control and Status Register
WDCNTR 0x00 7023 1 Watchdog Counter Register
WDKEY 0x00 7025 1 Watchdog Reset Key Register
WDCR 0x00 7029 1 Watchdog Control Register
(1) All registers in this table are EALLOW protected.
Copyright © 2009–2013, Texas Instruments Incorporated Functional Overview 47
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