Datasheet

Conversion 0 (A)
13 ADCClocks
Minimum
7 ADCCLKs
SOC0 (A/B)
ADCCLK
ADCRESULT 0
S/HWindowPulsetoCore
ADCCTL1.INTPULSEPOS
ADCSOCFLG 1.SOC0
ADCINTFLG .ADCINTx
SOC2 (A/B)
9 22 24 37
19
ADCCLKs
20
Result 0 (A) Latched
Conversion 0 (B)
13 ADCClocks
Minimum
7 ADCCLKs
ADCSOCFLG 1.SOC1
ADCSOCFLG 1.SOC2
ADCRESULT 1
Result 0 (B) Latched
Conversion 1 (A)
13 ADCClocks
ADCRESULT 2
50
EOC0 Pulse
EOC1 Pulse
EOC2 Pulse
1 ADCCLK
2 ADCCLKs
2 ADCCLKs
AnalogInputB
SOC0 Sample
BWindow
SOC2 Sample
BWindow
AnalogInput A
SOC0 Sample
A Window
SOC2 Sample
A Window
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584J –APRIL 2009–REVISED OCTOBER 2013 www.ti.com
Figure 6-30. Timing Example for Simultaneous Mode / Late Interrupt Pulse
142 Electrical Specifications Copyright © 2009–2013, Texas Instruments Incorporated
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TMS320F28035