Datasheet

SOC0
ADCCLK
ADCRESULT 0
S/HWindowPulsetoCore
ADCCTL 1.INTPULSEPOS
ADCSOCFLG 1.SOC0
ADCINTFLG.ADCINTx
SOC1 SOC2
9 15 22 24 3720
Result 0 Latched
ADCSOCFLG 1.SOC1
ADCSOCFLG 1.SOC2
ADCRESULT 1
EOC0 Pulse
EOC1 Pulse
Conversion 0
13 ADCClocks
Minimum
7 ADCCLKs
6
ADCCLKs
Conversion 1
13 ADCClocks
Minimum
7 ADCCLKs
2 ADCCLKs
1 ADCCLK
AnalogInput
SOC1 Sample
Window
SOC0 Sample
Window
SOC2 Sample
Window
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584J –APRIL 2009–REVISED OCTOBER 2013 www.ti.com
6.11.13.3 ADC Sequential and Simultaneous Timings
Figure 6-28. Timing Example for Sequential Mode / Late Interrupt Pulse
140 Electrical Specifications Copyright © 2009–2013, Texas Instruments Incorporated
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TMS320F28035