Datasheet

XINT1,XINT2,XINT3
t
w(INT)
InterruptVector
t
d(INT)
Addressbus
(internal)
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584J –APRIL 2009–REVISED OCTOBER 2013 www.ti.com
6.11.8 External Interrupt Timing
Table 6-29. External Interrupt Timing Requirements
(1)
TEST CONDITIONS MIN MAX UNIT
t
w(INT)
(2)
Pulse duration, INT input low/high Synchronous 1t
c(SCO)
cycles
With qualifier 1t
c(SCO)
+ t
w(IQSW)
cycles
(1) For an explanation of the input qualifier parameters, see Table 6-12.
(2) This timing is applicable to any GPIO pin configured for ADCSOC functionality.
Table 6-30. External Interrupt Switching Characteristics
(1)
over recommended operating conditions (unless otherwise noted)
PARAMETER MIN MAX UNIT
t
d(INT)
Delay time, INT low/high to interrupt-vector fetch t
w(IQSW)
+ 12t
c(SCO)
cycles
(1) For an explanation of the input qualifier parameters, see Table 6-12.
Figure 6-20. External Interrupt Timing
128 Electrical Specifications Copyright © 2009–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320F28030 TMS320F28031 TMS320F28032 TMS320F28033 TMS320F28034
TMS320F28035