Datasheet

TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
www.ti.com SPRS584J –APRIL 2009–REVISED OCTOBER 2013
6.4 Current Consumption
Table 6-1. TMS320F2803x Current Consumption at 60-MHz SYSCLKOUT
VREG ENABLED VREG DISABLED
MODE TEST CONDITIONS I
DDIO
(1)
I
DDA
(2)
I
DD
I
DDIO
(1)
I
DDA
(2)
TYP
(3)
MAX TYP
(3)
MAX TYP
(3)
MAX TYP
(3)
MAX TYP
(3)
MAX
The following peripheral clocks
are enabled:
• ePWM1/2/3/4/5/6/7
• eCAP1
• eQEP1
• eCAN
• LIN
• CLA
• HRPWM
• SCI-A
Operational
114 mA
(6)
135 mA
(6)
14 mA 18 mA 101 mA
(6)
120 mA
(6)
14 mA 18 mA 14 mA 18 mA
• SPI-A/B
(Flash)
• ADC
• I
2
C
• COMP1/2/3
• CPU-TIMER0/1/2
All PWM pins are toggled at
60 kHz.
All I/O pins are left
unconnected.
(4)(5)
Code is running out of flash
with 2 wait-states.
XCLKOUT is turned off.
Flash is powered down.
XCLKOUT is turned off.
IDLE 13 mA 23 mA 10 μA 15 μA 13 mA 24 mA 120 μA 400 μA 10 μA 15 μA
All peripheral clocks are turned
off.
Flash is powered down.
STANDBY 4 mA 9 mA 10 μA 15 μA 4 mA 7 mA 120 μA 400 μA 10 μA 15 μA
Peripheral clocks are off.
Flash is powered down.
HALT Peripheral clocks are off. 46 μA 10 μA 15 μA 30 μA 24 μA 10 μA 15 μA
Input clock is disabled.
(7)
(1) I
DDIO
current is dependent on the electrical loading on the I/O pins.
(2) In order to realize the I
DDA
currents shown for IDLE, STANDBY, and HALT, clock to the ADC module must be turned off explicitly by
writing to the PCLKCR0 register.
(3) The TYP numbers are applicable over room temperature and nominal voltage.
(4) The following is done in a loop:
• Data is continuously transmitted out of SPI-A/B, SCI-A, eCAN, LIN, and I
2
C ports.
• The hardware multiplier is exercised.
• Watchdog is reset.
• ADC is performing continuous conversion.
• COMP1/2 are continuously switching voltages.
• GPIO17 is toggled.
(5) CLA is continuously performing polynomial calculations.
(6) For F2803x devices that do not have CLA, subtract the I
DD
current number for CLA (see Table 6-2) from the I
DD
(VREG disabled)/I
DDIO
(VREG enabled) current numbers shown in Table 6-1 for operational mode.
(7) If a quartz crystal or ceramic resonator is used as the clock source, the HALT mode shuts down the on-chip crystal oscillator.
NOTE
The peripheral - I/O multiplexing implemented in the device prevents all available peripherals
from being used at the same time. This is because more than one peripheral function may
share an I/O pin. It is, however, possible to turn on the clocks to all the peripherals at the
same time, although such a configuration is not useful. If this is done, the current drawn by
the device will be more than the numbers specified in the current consumption tables.
Copyright © 2009–2013, Texas Instruments Incorporated Electrical Specifications 107
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