Datasheet

TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022

TMS320F28021, TMS320F28020, TMS320F280200

SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013

www.ti.com

4.4 Inter-Integrated Circuit (I

The device contains one I

C Serial Port. Figure 4-7 shows how the I

C peripheral module interfaces within

the device.

The I

C module has the following features:

• Compliance with the Philips Semiconductors I

C-bus specification (version 2.1):

– Support for 1-bit to 8-bit format transfers

– 7-bit and 10-bit addressing modes

– General call

– START byte mode

– Support for multiple master-transmitters and slave-receivers

– Support for multiple slave-transmitters and master-receivers

– Combined master transmit/receive and receive/transmit mode

– Data transfer rate of from 10 kbps up to 400 kbps (I

C Fast-mode rate)

• One 4-word receive FIFO and one 4-word transmit FIFO

• One interrupt that can be used by the CPU. This interrupt can be generated as a result of one of the

following conditions:

– Transmit-data ready

– Receive-data ready

– Register-access ready

– No-acknowledgment received

– Arbitration lost

– Stop condition detected

– Addressed as slave

• An additional interrupt that can be used by the CPU when in FIFO mode

• Module enable/disable capability

• Free data format mode

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TMS320F28020 TMS320F280200